Electronic device and power converter

US11848622B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11848622-B2
Application numberUS-202117468378-A
CountryUS
Kind codeB2
Filing dateSep 7, 2021
Priority dateOct 8, 2020
Publication dateDec 19, 2023
Grant dateDec 19, 2023

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

An electronic device has a primary loop circuit that includes a main circuit causing a current to flow in a loop shape; and a secondary loop circuit that is disposed to face the primary loop circuit at a predetermined distance, and causes an induced current generated by a magnetic field generated in the primary loop circuit to flow in a loop shape.

First claim

Opening claim text (preview).

The invention claimed is: 1. An electronic device comprising: a primary loop circuit that comprises a main circuit causing a current to flow in a loop shape; a secondary loop circuit that is disposed to face the primary loop circuit at a predetermined distance, and causes an induced current generated by a magnetic field generated in the primary loop circuit to flow in a loop shape; a first layer in which the primary loop circuit is disposed; and a second layer that is stacked above or below the first layer at the predetermined distance, and in which the secondary loop circuit is disposed, wherein the secondary loop circuit is disposed so as to surround a part of a region on the second layer from a first end portion to a second end portion on the second layer, and the first end portion and the second end portion are connected to opposite ends of the resistance element via the separate first contacts, respectively. 2. The electronic device according to claim 1 , wherein the secondary loop circuit does not comprise an active element but comprises a passive element. 3. The electronic device according to claim 1 , wherein the secondary loop circuit has a shape and a size which correspond to a shape and a size of the primary loop circuit. 4. The electronic device according to claim 1 , wherein the predetermined distance is a distance within a range in which the primary loop circuit and the secondary loop circuit are magnetically coupled. 5. An electronic device comprising: a primary loop circuit that comprises a main circuit causing a current to flow in a loop shape; a secondary loop circuit that is disposed to face the primary loop circuit at a predetermined distance, and causes an induced current generated by a magnetic field generated in the primary loop circuit to flow in a loop shape; a first layer in which the primary loop circuit is disposed; and a second layer that is stacked above or below the first layer at the predetermined distance, and in which the secondary loop circuit is disposed, wherein the primary loop circuit and at least a part of the secondary loop circuit are disposed so as to vertically overlap each other when the first layer and the second layer are viewed in a plan view. 6. The electronic device according to claim 5 , wherein each of the first layer and the second layer is disposed on a front surface, a back surface, or an inner layer surface of a base substrate. 7. The electronic device according to claim 1 , wherein the primary loop circuit and at least a part of the secondary loop circuit are disposed so as to vertically overlap each other when the first layer and the second layer are viewed in a plan view. 8. The electronic device according to claim 5 , further comprising: first contacts that electrically connect at least a part of the first layer with at least a part of the second layer; and a resistance element that is disposed on the first layer and electrically connected to the secondary loop circuit via the first contacts. 9. The electronic device according to claim 8 , wherein the secondary loop circuit is disposed so as to surround a part of a region on the second layer from a first end portion to a second end portion on the second layer, and the first end portion and the second end portion are connected to opposite ends of the resistance element via the separate first contacts, respectively. 10. The electronic device according to claim 5 , further comprising a third layer having a solid pattern, the third layer being electrically connected to a part of the second layer. 11. The electronic device according to claim 10 , further comprising a second contact that electrically connects a part of the second layer with the third layer. 12. The electronic device according to claim 10 , further comprising a third contact that electrically connects a part of the first layer with the third layer. 13. The electronic device according to claim 10 , wherein the third layer is disposed on a front surface, a back surface, or an inner layer surface of a base substrate. 14. The electronic device according to claim 1 , wherein the main circuit comprises a high-side semiconductor element and a low-side semiconductor element that periodically switch a direction of a current flowing in the main circuit. 15. An electronic device comprising: a primary loop circuit that comprises a main circuit causing a current to flow in a loop shape; and a secondary loop circuit that is disposed to face the primary loop circuit at a predetermined distance, and causes an induced current generated by a magnetic field generated in the primary loop circuit to flow in a loop shape, wherein the primary loop circuit comprises a first current path that periodically changes the direction of the current by periodically switching operations of the high-side semiconductor element and the low-side semiconductor element, and a capacitor connected on the first current path, and the secondary loop circuit comprises a second current path through which an induced current corresponding to a magnetic field generated by the current flowing through the first current path flows. 16. The electronic device according to claim 1 , wherein a circuit component in the primary loop circuit is at least one of a chip component or a surface mounting component. 17. The electronic device according to claim 1 , wherein the main circuit is a power conversion circuit. 18. A power converter comprising: a primary loop circuit that comprises a main circuit performing power conversion by causing a current to flow in a loop shape; and a secondary loop circuit that is disposed to face the primary loop circuit at a predetermined distance and causes an induced current generated by a magnetic field generated in the primary loop circuit to flow in a loop shape, wherein the main circuit comprises a high-side semiconductor element and a low-side semiconductor element that periodically switch a direction of the current flowing in the main circuit, the primary loop circuit comprises a first current path that periodically changes the direction of the current by periodically switching operations of the high-side semiconductor element and the low-side semiconductor element, and a capacitor connected on the first current path, and the secondary loop circuit comprises a second current path through which an induced current corresponding to a magnetic field generated by the current flowing through the first current path flows.

Assignees

Inventors

Classifications

  • H02M7/537Primary

    using semiconductor devices only, e.g. single switched pulse inverters · CPC title

  • Constructional details, e.g. physical layout, assembly, wiring or busbar connections · CPC title

  • H01F19/04Primary

    Transformers or mutual inductances suitable for handling frequencies considerably beyond the audio range (resonant circuits H03H) · CPC title

  • Printed windings · CPC title

  • on stacked layers · CPC title

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Frequently asked questions

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What does patent US11848622B2 cover?
An electronic device has a primary loop circuit that includes a main circuit causing a current to flow in a loop shape; and a secondary loop circuit that is disposed to face the primary loop circuit at a predetermined distance, and causes an induced current generated by a magnetic field generated in the primary loop circuit to flow in a loop shape.
Who is the assignee on this patent?
Toshiba Kk
What technology area does this patent fall under?
Primary CPC classification H02M7/537. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 19 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).