Sense amplifier and operation method thereof

US11848046B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11848046-B2
Application numberUS-202217694771-A
CountryUS
Kind codeB2
Filing dateMar 15, 2022
Priority dateMar 15, 2022
Publication dateDec 19, 2023
Grant dateDec 19, 2023

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Abstract

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The application provides a sense amplifier and an operation method thereof. The operation method for the sense amplifier includes: during a first phase, initializing a first sensing input voltage and a second input sensing voltage; and recording a first sensing output voltage and a second sensing output voltage of a previous round by charges stored in a plurality of transistors of the sense amplifier; during a second phase, sampling the first sensing output voltage and the second sensing output voltage of a current round as a plurality of transit points; during a first sub-phase of a third phase, amplifying a voltage difference between an input signal and a first reference voltage; and during a second sub-phase of the third phase, pulling the first sensing output voltage and the second sensing output voltage into a full-swing voltage range, and recording charges to the transistors of the sense amplifier.

First claim

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What is claimed is: 1. An operation method for a sense amplifier, the operation method comprising: during a first phase, initializing a first sensing input voltage and a second input sensing voltage; and recording a first sensing output voltage and a second sensing output voltage of a previous round by charges stored in a plurality of transistors of the sense amplifier; during a second phase, sampling the first sensing output voltage and the second sensing output voltage of a current round as a plurality of transit points; during a first sub-phase of a third phase, amplifying a voltage difference between an input signal and a first reference voltage; and during a second sub-phase of the third phase, pulling the first sensing output voltage and the second sensing output voltage into a full-swing voltage range, and recording charges to the transistors of the sense amplifier. 2. The operation method for the sense amplifier according to claim 1 , wherein during the first phase, initializing the first sensing input voltage and the second input sensing voltage includes: initializing the first sensing input voltage and the second input sensing voltage as a second reference voltage. 3. The operation method for the sense amplifier according to claim 1 , wherein during the second phase, sampling the first sensing output voltage and the second sensing output voltage of the current round as the plurality of transit points includes: sampling the first sensing output voltage and the second sensing output voltage as the respective transit points of a plurality of signal paths. 4. The operation method for the sense amplifier according to claim 3 , wherein during the second phase, sampling the first sensing output voltage as a plurality of first threshold voltages of a plurality of transistors of a first signal path; and sampling the second sensing output voltage as a plurality of second threshold voltages of a plurality of transistors of a second signal path. 5. The operation method for the sense amplifier according to claim 1 , wherein during the first sub-phase of the third phase, amplifying the voltage difference between the input signal and the first reference voltage includes: a voltage difference between the first reference voltage and a first node is capacitively coupled to the first sensing input voltage to cause a first voltage change of the first sensing input voltage; a voltage difference between the input signal and a second node is capacitively coupled to the second sensing input voltage to cause a second voltage change of the second sensing input voltage; and the first voltage change of the first sensing input voltage and the second voltage change of the second sensing input voltage reflect the first sensing output voltage and the second sensing output voltage. 6. The operation method for the sense amplifier according to claim 5 , wherein during the first sub-phase of the third phase, when the input signal is higher than the first reference voltage, the first sensing output voltage is gradually lowered and the second sensing output voltage is gradually increased via a positive feedback effect; and when the input signal is lower than the first reference voltage, the first sensing output voltage is gradually increased and the second sensing output voltage is gradually lowered via the positive feedback effect. 7. The operation method for the sense amplifier according to claim 1 , wherein during the second sub-phase of the third phase, pulling the first sensing output voltage and the second sensing output voltage into the full-swing voltage range includes: when the first sensing output voltage is higher than the second sensing output voltage, pulling the first sensing output voltage and the second sensing output voltage to a second reference voltage and a third reference voltage, respectively; and when the first sensing output voltage is lower than the second sensing output voltage, pulling the first sensing output voltage and the second sensing output voltage to the third reference voltage and the second reference voltage, respectively. 8. The operation method for the sense amplifier according to claim 1 , wherein during the first phase, recording the first sensing output voltage and the second sensing output voltage of the previous round by charges stored in a plurality of gates of the transistors of the sense amplifier; and during the second sub-phase of the third phase, recording charges to the respective gates of the transistors of the sense amplifier. 9. A sense amplifier comprising: a plurality of transistors; and a plurality of pass gates coupled to the transistors, wherein during a first phase, initializing a first sensing input voltage and a second input sensing voltage; and recording a first sensing output voltage and a second sensing output voltage of a previous round by charges stored in the transistors; during a second phase, sampling the first sensing output voltage and the second sensing output voltage of a current round as a plurality of transit points; during a first sub-phase of a third phase, amplifying a voltage difference between an input signal and a first reference voltage; and during a second sub-phase of the third phase, pulling the first sensing output voltage and the second sensing output voltage into a full-swing voltage range, and recording charges to the transistors of the sense amplifier. 10. The sense amplifier according to claim 9 , wherein during the first phase, the first sensing input voltage and the second input sensing voltage are initialized by: initializing the first sensing input voltage and the second input sensing voltage as a second reference voltage. 11. The sense amplifier according to claim 9 , wherein during the second phase, the first sensing output voltage and the second sensing output voltage of the current round are sampled as the plurality of transit points by: sampling the first sensing output voltage and the second sensing output voltage as the respective transit points of a plurality of signal paths. 12. The sense amplifier according to claim 11 , wherein during the second phase, sampling the first sensing output voltage as a plurality of first threshold voltages of a plurality of transistors of a first signal path; and sampling the second sensing output voltage as a plurality of second threshold voltages of a plurality of transistors of a second signal path. 13. The sense amplifier according to claim 9 , wherein during the first sub-phase of the third phase, the voltage difference between the input signal and the first reference voltage is amplified by: capacitively coupling a voltage difference between the first reference voltage and a first node to the first sensing input voltage to cause a first voltage change of the first sensing input voltage; capacitively coupling a voltage difference between the input signal and a second node to the second sensing input voltage to cause a second voltage change of the second sensing input voltage; and reflecting the first sensing output voltage and the second sensing output voltage by the first voltage change of the first sensing input voltage and the second voltage change of the second sensing input voltage. 14. The sense amplifier according to claim 13 , wherein during the first sub-phase of the third phase, when the input signal is higher than the first reference voltage, the first sensing output voltage is gradually lowered and the second sensing output voltage is gradually increased via a positive feedback effect; and when the input signal is lower than the first reference voltage, the first sensing output vo

Assignees

Inventors

Classifications

  • Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating · CPC title

  • Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits · CPC title

  • Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches · CPC title

  • Dummy cell treatment; Reference voltage generators · CPC title

  • G11C16/26Primary

    Sensing or reading circuits; Data output circuits · CPC title

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What does patent US11848046B2 cover?
The application provides a sense amplifier and an operation method thereof. The operation method for the sense amplifier includes: during a first phase, initializing a first sensing input voltage and a second input sensing voltage; and recording a first sensing output voltage and a second sensing output voltage of a previous round by charges stored in a plurality of transistors of the sense amp…
Who is the assignee on this patent?
Macronix Int Co Ltd
What technology area does this patent fall under?
Primary CPC classification G11C11/4091. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 19 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).