Spatially coupled forward error correction encoding method and device using generalized error locating codes as component codes

Patent metadata

Field	Value
Publication number	US-11843459-B2
Application number	US-202217837916-A
Country	US
Kind code	B2
Filing date	Jun 10, 2022
Priority date	Dec 13, 2019
Publication date	Dec 12, 2023
Grant date	Dec 12, 2023

Abstract

The present disclosure provides an encoding and decoding device implementing an improved forward error correction (FEC) coding/decoding method. In particular, the encoding device is configured to encode a stream of data symbols using a spatially coupled code (e.g. staircase codes, braided block codes or continuously interleaved block codes), wherein at least one generalized error location (GEL) code is used as a component code of the spatially coupled code. Accordingly, the decoding device is configured to decode a sequence of encoded symbol blocks using a spatially coupled code, wherein at least one GEL code is used as a component code of the spatially coupled code. Thereby, a suitable spatially coupled FEC code that allows for very low-latency, high-throughput, high-rate applications with a low-complexity decoding procedure, and allows for mitigation of the error-floor, is designed.

First claim

What is claimed is:

1. An encoding device including a processor configured to:
encode a stream of data symbols using a spatially coupled code,
wherein at least one generalized error location, GEL, code is used as a component code of the spatially coupled code, and
wherein spatially coupled codewords share symbols with previously formed codewords and subsequently formed codewords.

2. The encoding device according to claim 1 , wherein the processor is further configured to:
map the stream of data symbols into a sequence of blocks of symbols, wherein each block of symbols comprises L symbols, L being a positive integer, and a number of data symbols among the L symbols in each block of symbols is less than or equal to L; and
form a plurality of codewords of the at least one GEL code using one or more symbols of a first block (Bi) and one or more symbols of one or more second blocks (Bj).

3. The encoding device according to claim 2 , wherein:
each codeword of the at least one GEL code comprises information symbols and check symbols, and
a code length of each codeword of the at least one GEL code is less than or equal to M, M being a positive integer.

4. The encoding device according to claim 3 , wherein the processor is further configured to:
generate the check symbols of each codeword of the at least one GEL code using the one or more data symbols of the first block (Bi) and the one or more symbols of the one or more second blocks (Bj); and
store the generated check symbols of each codeword of the at least one GEL code in the first block (Bi), wherein a total number of the generated check symbols and data symbols in the first block Bi is equal to L.

5. The encoding device according to claim 2 , wherein:
the processor is further configured to divide each first block (Bi) into a number s of m by m matrices, wherein each first block (Bi) is represented as a (s*m) by m matrix, where s and m are positive integers.

6. The encoding device according to claim 5 , wherein the plurality of codewords of the at least one GEL code are represented as a (2*s*m) by m matrix.

7. The encoding device according to claim 5 , wherein the processor is further configured to obtain at least one codeword of the plurality of codewords of the at least one GEL code based on the following m by m matrices:
(i−f(i,1), p(i,1)), (i−f(i,2), p(i,2)), . . . , (i−f(i,s), p(i,s)), (i,1), (i,2), . . . , (i,s), where f(x,y) is an integer valued function and p(x,y) is a permutation function for any x, where f(i,1)>f(i,2)> . . . >f(i,s)>0 for any positive integer i, and a value domain of the integer valued function p(x,y) is {1,2, . . . , s}.

8. The encoding device according to claim 2 , wherein each symbol of the first block (Bi) is used as either an information symbol or a check symbol for a respective codeword of the at least one GEL code.

9. The encoding device according to claim 3 , wherein all symbols of the first block (Bi) and the one or more symbols of the one or more second blocks (Bj) are represented as an n by N matrix, n and N being positive integers.

10. The encoding device according to claim 9 , wherein the plurality of codewords of each GEL code are represented as a matrix with n rows and a number of columns less than or equal to N.

11. The encoding device according to claim 9 , wherein a sum of lengths of all codewords of the plurality of codewords of the at least one GEL code is equal to n*N.

12. A decoding device including a processor configured to:
decode a sequence of encoded symbol blocks using a spatially coupled code,
wherein at least one generalized error location, GEL, code is used as a component code of the spatially coupled code, and
wherein spatially coupled codewords share symbols with previously formed codewords and subsequently formed codewords.

13. An encoding method implemented in a processor, the method comprising:
encoding a stream of data symbols using a spatially coupled code,
wherein at least one generalized error location, GEL, code is used as a component code of the spatially coupled code, and
wherein spatially coupled codewords share symbols with previously formed codewords and subsequently formed codewords.

14. A decoding method implemented in a processor, the method comprising:
decoding a sequence of encoded symbol blocks using a spatially coupled code,
wherein at least one generalized error location, GEL, code is used as a component code of the spatially coupled code, and
wherein spatially coupled codewords share symbols with previously formed codewords and subsequently formed codewords.

Assignees

• Huawei Tech Co Ltd

Inventors

• Gritsenko Vladimir Vitalievich
• Obolentsev Vladislav Nikolaevich
• Bukhan Dmitrii Yurievich
• Maevskii Aleksei Eduardovich
• Yu Hongchen
• Gu Kun
• Chen Jie
• Xiao Shiyao
• Zhao Man
• Chen Jun
• Li Yunlong

Classifications

• H04L1/0041 Primary

  Arrangements at the transmitter end · CPC title

• H04L1/0045

  Arrangements at the receiver end · CPC title

• H04L1/0071

  Use of interleaving (interleaving per se H03M13/27) · CPC title

• H03M13/2906 Primary

  using block codes (H03M13/2957 takes precedence) · CPC title

• H03M13/293

  with erasure setting · CPC title