Storage device and operating method of storage device

Patent metadata

Field	Value
Publication number	US-11836041-B2
Application number	US-202217900336-A
Country	US
Kind code	B2
Filing date	Aug 31, 2022
Priority date	May 21, 2018
Publication date	Dec 5, 2023
Grant date	Dec 5, 2023

Abstract

A storage device includes a nonvolatile memory device, and a controller that reads first data from the nonvolatile memory device. When a number of first errors of the first data is not smaller than a first threshold value, the controller determines whether the first errors include timing errors arising from a variation of signal transmission timings between the nonvolatile memory device and the controller and performs a retraining operation on the signal transmission timings when the first errors include the timing errors.

First claim

What is claimed is:

1. A storage device comprising:
a non-volatile memory;
a buffer memory; and
a controller coupled to the non-volatile memory and the buffer memory, and to configured to read first data from the non-volatile memory and to compare the number of errors of the first data with a first threshold,
wherein, when the number of errors of the first data is equal to or greater than the first threshold, the controller is configured to compare the number of timing errors of the first data with a second threshold,
when the number of timing errors of the first data is equal to or greater than the second threshold, the controller is configured to perform a retraining operation to calibrate the timing errors,
after the retraining operation, the controller is configured to read second data, and to compare the number of errors of the second data with a third threshold, and
when the number of errors of the second data is equal to or greater than the third threshold, the controller is configured to perform an error process to correct memory errors.

2. The storage device of claim 1 , wherein the controller performs the retraining operation to calibrate a delay of a delay locked loop included in the storage device.

3. The storage device of claim 2 , wherein the non-volatile memory includes the delay locked loop.

4. The storage device of claim 2 , wherein the controller includes the delay locked loop.

5. The storage device of claim 1 , wherein the controller performs the retraining operation on the non-volatile memory, when an access to the non-volatile memory is required or during an idle time indicating a time when a task which is transmitted from an external host device and which the controller should process does not exist.

6. The storage device of claim 1 , wherein the first threshold is less than the maximum number of errors which the controller can correct.

7. The storage device of claim 1 , wherein the controller performs the error process to correct the memory errors:
by performing a refresh operation of reading the second data and storing the second data with a new address, when the memory errors are correctable; or
by performing a read retry operation in which read operations are repeatedly performed while read voltages are adjusted, when the memory errors are uncorrectable.

8. A storage device comprising:
a non-volatile memory;
a buffer memory; and
a controller coupled to the non-volatile memory and the buffer memory, and to configured to read first data from the non-volatile memory and to compare the number of errors of the first data with a first threshold,
wherein, when the number of errors of the first data is equal to or greater than the first threshold, the controller is configured to compare a difference between a first time and a second time with a second threshold, the first time being a time when a first retraining operation is performed, the second time being a time when a second retraining operation is performed, and
when the difference between the first time and the second time is equal to or greater than the second threshold, the controller configured to perform a retraining operation.

9. The storage device of claim 8 , wherein when the difference between the first time and the second time is equal to or greater than the second threshold, the controller determines that the first data includes timing errors.

10. The storage device of claim 8 , wherein after the retraining operation, the controller reads second data, and compares the number of errors of the second data with a third threshold, and
when the number of errors of the second data is equal to or greater than the third threshold, the controller performs an error process to correct memory errors.

11. The storage device of claim 8 , wherein the controller performs the retraining operation to calibrate a delay of a delay locked loop included in the storage device.

12. The storage device of claim 11 , wherein the controller performs an initial training operation to calibrate the delay of the delay locked loop, after a power is supplied to the storage device or after the storage device is reset.

13. The storage device of claim 8 , wherein the retraining operation includes a read training operation of adjusting timings at which the non-volatile memory transmits data.

14. The storage device of claim 8 , wherein the retraining operation includes a write training operation of adjusting timings at which the controller transmits data.

15. A storage device comprising:
a non-volatile memory;
a buffer memory; and
a controller coupled to the non-volatile memory and the buffer memory, and to configured to read first data from the non-volatile memory and to compare the number of errors of the first data with a first threshold,
wherein, when the number of errors of the first data is equal to or greater than the first threshold, the controller is configured to compare a difference between a first temperature and a current temperature with a second threshold, the first temperature being a temperature when a first retraining operation is performed, and
when the difference between the first temperature and the current temperature is equal to or greater than the second threshold, the controller configured to perform a retraining operation.

16. The storage device of claim 15 , wherein when the difference between the first temperature and the current temperature is equal to or greater than the second threshold, the controller determines that the first data includes timing errors.

17. The storage device of claim 15 , wherein after the retraining operation, the controller reads second data, and compares the number of errors of the second data with a third threshold, and
when the number of errors of the second data is equal to or greater than the third threshold, the controller performs an error process to correct memory errors.

18. The storage device of claim 15 , wherein the controller performs the retraining operation to calibrate a delay of a delay locked loop included in the storage device.

19. The storage device of claim 15 , wherein the controller stores the first data to the buffer memory, and does not write the first data to the non-volatile memory.

20. The storage device of claim 15 , wherein the retraining operation includes a read training operation and a write training operation.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Lee Chulseung
• Hwang Soon Suk
• Lee Choongeui

Classifications

• G06F11/1068 Primary

  in sector programmable memories, e.g. flash disk (G06F11/1072 takes precedence) · CPC title

• G06F3/0619

  in relation to data integrity, e.g. data losses, bit errors · CPC title

• G06F3/0659

  Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title

• G06F3/0679

  Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

• G11C7/1084

  Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load · CPC title