Providing codewords

Patent metadata

Field	Value
Publication number	US-11831344-B2
Application number	US-202016747567-A
Country	US
Kind code	B2
Filing date	Jan 21, 2020
Priority date	Jan 21, 2019
Publication date	Nov 28, 2023
Grant date	Nov 28, 2023

Abstract

A method for providing codewords, the method may include receiving by an input buffer, one or more chunks of data; calculating a location of relevant bits within one or more chunks of data; wherein the relevant bits comprise (a) variable length retrieval information used during a retrieval process of a first type codeword, or (b) a second type codeword; performing the retrieval process of the first type codeword and retrieving the first type codeword from a memory unit that stores only a fraction of a codebook, the codebook comprises first type codewords and second type codewords; determining whether the relevant bits comprises the second type codeword or not; and outputting the second type codeword or the first type codeword, based on the determination.

First claim

We claim:

1. A method for providing codewords, the method comprises:
receiving by an input buffer, one or more chunks of data;
calculating a location of relevant bits within the one or more chunks of data, wherein the relevant bits comprise (a) variable length retrieval information used during a retrieval process of a first type codeword or (b) a second type codeword;
performing the retrieval process of the first type codeword and retrieving the first type codeword from a memory unit that stores only a fraction of a codebook, the codebook comprises first type codewords and second type codewords;
determining whether the relevant bits comprise the second type codeword or not; and
outputting the second type codeword or the first type codeword based on the determination.

2. The method according to claim 1 wherein the memory unit is an address to first type codeword look up table.

3. The method according to claim 1 further comprising storing, in the memory unit, different classes of first type codewords, one class after the other, wherein the performing of the retrieval process of the first type codeword comprises:
determining a class of the first type codeword;
determining a base address of the class of the first type codeword;
determining an address offset of the first type codeword from the base address; and
determining the address of the first type codeword based on the base address and the address offset.

4. The method according to claim 3 wherein the determining of the class of the first type address comprises:
retrieving a first part of the relevant bits; and
finding the class by accessing a first look up table (LUT) that maps values of the first part of the relevant bits to classes of first type codewords.

5. The method according to claim 4 wherein the finding comprises outputting a class indicator from the first LUT and wherein the finding is followed by accessing a second LUT with the class indicator and outputting, from the second LUT, a second LUT output that comprises the base address of the class and length information indicative of a length of the variable length retrieval information.

6. The method according to claim 5 wherein the second LUT output further comprises a selection indicator that is indicative of whether the relevant bits comprise the second type codeword or not.

7. The method according to claim 5 comprising retrieving the second type codeword based on the length information.

8. The method according to claim 5 comprising retrieving the address offset based on the length information.

9. The method according to claim 1 wherein the first type codeword and the second type codeword store information about at least a portion of at least one neural network weight.

10. The method according to claim 1 wherein the steps of calculating, performing, determining and outputting are executed during a single clock cycle.

11. The method according to claim 1 wherein the steps of calculating, performing, determining and outputting are executed during two clock cycles.

12. A non-transitory computer readable medium for providing codewords, the A non-transitory computer readable medium stores instructions for:
receiving by an input buffer, one or more chunks of data;
calculating a location of relevant bits within the one or more chunks of data, wherein the relevant bits comprise (a) variable length retrieval information used during a retrieval process of a first type codeword or (b) a second type codeword;
performing the retrieval process of the first type codeword and retrieving the first type codeword from a memory unit that stores only a fraction of a codebook, the codebook comprises first type codewords and second type codewords;
determining whether the relevant bits comprises the second type codeword or not; and
outputting the second type codeword or the first type codeword based on the determination.

13. A device for providing codewords, the device comprises:
an input buffer configured to receive one or more chunks of data;
a memory unit configured to store only a fraction of a codebook, the codebook comprises first type codewords and second type codewords;
one more circuits that are configured to:
calculate a location of relevant bits within the one or more chunks of data; wherein the relevant bits comprise (a) variable length retrieval information used during a retrieval process of a first type codeword or (b) a second type codeword;
perform the retrieval process of the first type codeword and retrieve the first type codeword from the memory unit;
determine whether the relevant bits comprise the second type codeword or not; and
output the second type codeword or the first type codeword based on the determination.

14. The device according to claim 13 wherein the one or more circuit comprise at least one lookup table and wherein the memory unit stores another lookup table.

15. The device according to claim 13 wherein the memory unit is an address to first type codeword look up table.

16. The device according to claim 13 wherein the memory unit is configured to store different classes of first type codewords, one class after the other.

17. The device according to claim 16 wherein the one more circuits are configured to perform the retrieval process of the first type codeword by:
determining a class of the first type codeword;
determining a base address of the class of the first type codeword;
determining an address offset of the first type codeword from the base address; and
determining the address of the first type codeword based on the base address and the address offset.

18. The device according to claim 17 wherein the one more circuits are configured to perform the determining of the class of the first type address by:
retrieving a first part of the relevant bits; and
finding the class by accessing a first look up table (LUT) that maps values of the first part of the relevant bits to classes of first type codewords.

19. The device according to claim 18 wherein the one more circuits are configured to perform the finding by outputting a class indicator from the first LUT, wherein the finding is followed by accessing a second LUT with the class indicator and outputting from the second LUT, a second LUT output that comprises the base address of the class and length information indicative of a length of the variable length retrieval information.

20. The device according to claim 19 wherein the second LUT output further comprises a selection indicator that is indicative of whether the relevant bits comprise the second type codeword or not.

21. The device according to claim 19 wherein the one more circuits are configured to retrieve the second type codeword based on the length information.

22. The device according to claim 19 wherein the one more circuits are configured to retrieve the address offset based on the length information.

23. The device according to claim 13 wherein the first type codeword and the second type codeword store information about at least a portion of at least one neural network weight.

24. The device according to claim 13 wherein the one more circuits are configured to (i) calculate the location of relevant bits, (ii) perform the retrieval process, and (iii) determine whether the relevant bits comprise the second type codeword during a single clock cycle.

25. The device according to claim 13 wherein the one more circuits are con

Assignees

• Dsp Group Ltd

Inventors

• Malach Tomer
• Haiut Moshe

Classifications

• G06N3/0495

  Quantised networks; Sparse networks; Compressed networks · CPC title

• H03M7/425 Primary

  for the decoding process only · CPC title

• G06N3/063 Primary

  using electronic means · CPC title

• G06N3/08

  Learning methods · CPC title