Millimeter-wave power amplifier

US11831279B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11831279-B2
Application numberUS-202117227755-A
CountryUS
Kind codeB2
Filing dateApr 12, 2021
Priority dateApr 12, 2021
Publication dateNov 28, 2023
Grant dateNov 28, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

In accordance with an embodiment, a method for operating a millimeter-wave power amplifier including an input transistor having an output node coupled to a load path of a cascode transistor includes: receiving a millimeter-wave transmit signal at a control node of the input transistor; amplifying the millimeter-wave transmit signal to form an output signal; providing the output signal to a load coupled to an output node of the cascode transistor; and adjusting a first DC bias current of the input transistor to form a substantially constant second DC bias current of the cascode transistor.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for operating a millimeter-wave power amplifier comprising an input transistor having an output node coupled to a load path of a cascode transistor, the method comprising: receiving a millimeter-wave transmit signal at a control node of the input transistor; amplifying the millimeter-wave transmit signal to form an output signal; providing the output signal to a load coupled to an output node of the cascode transistor; and adjusting a first DC bias current of the input transistor to form a substantially constant second DC bias current of the cascode transistor. 2. The method of claim 1 , further comprising: generating a bias reference voltage; and comparing a voltage of a reference node of the cascode transistor to the bias reference voltage, wherein adjusting the first DC bias current comprises adjusting the first DC bias current until the bias reference voltage and the voltage of the reference node of the cascode transistor are substantially at a same DC voltage. 3. The method of claim 2 , wherein: comparing the voltage of the reference node of the cascode transistor to the bias reference voltage comprises using a transconductance amplifier; and adjusting the first DC bias current further comprises providing a bias voltage for the input transistor using a diode connected transistor coupled to an output of the transconductance amplifier and to the control node of the input transistor. 4. The method of claim 2 , wherein generating the bias reference voltage comprises: applying a reference current to a cascode reference transistor; and applying a same cascode bias voltage to a control node of the cascode transistor and a control node of the cascode reference transistor. 5. The method of claim 1 , wherein; the input transistor comprises a first input transistor and a second input transistor; the cascode transistor comprises a first cascode transistor and a second cascode transistor, wherein the first input transistor has an output node coupled to a load path of the first cascode transistor, and the second input transistor has an output node coupled to a load path of the second cascode transistor; and providing the output signal to the load comprises providing a first phase of the output signal to the load from the first cascode transistor, and providing a second phase of the output signal to the load from the second cascode transistor. 6. The method of claim 5 , wherein: receiving the millimeter-wave transmit signal comprises receiving the millimeter-wave transmit signal via a first transformer coupled between a control node of the first input transistor and a control node of the second input transistor; and providing the output signal to the load comprises providing the output signal to the load via a second transformer coupled between an output node of the first cascode transistor and an output node of the second cascode transistor. 7. The method of claim 1 , further comprising limiting the first DC bias current. 8. The method of claim 1 , further comprising, using an interstage matching network coupled between the output node of the input transistor and a reference node of the cascode transistor, modifying an impedance seen by the output node of the input transistor, wherein the interstage matching network at least partially compensates for an increased impedance caused by a parasitic inductance coupled between the output node of the input transistor and the reference node of the cascode transistor. 9. A millimeter-wave power amplifier comprising: a cascode transistor having an output node configured to be coupled to a load; an input transistor having an output node coupled to a load path of the cascode transistor; and a bias circuit coupled to the input transistor and the cascode transistor, the bias circuit configured to adjust a first DC bias current of the input transistor to form a substantially constant second DC bias current of the cascode transistor. 10. The millimeter-wave power amplifier of claim 9 , wherein the bias circuit comprises: a bias reference voltage generator configured to produce a bias reference voltage; and a feedback circuit configured to adjust the first DC bias current until the bias reference voltage and a voltage of a reference node of the cascode transistor have substantially a same DC voltage. 11. The millimeter-wave power amplifier of claim 10 , wherein: the feedback circuit comprises a transconductance amplifier having a first input coupled to the bias reference voltage generator and a second input coupled to the reference node of the cascode transistor; and a diode connected transistor coupled to an output of the transconductance amplifier and a control node of the input transistor. 12. The millimeter-wave power amplifier of claim 10 , wherein the bias reference voltage generator comprises a cascode reference transistor having a load path coupled to reference current source, and a control node coupled to a cascode bias node configured to provide a cascode reference voltage, wherein a control node of the cascode transistor is configured to receive a same cascode reference voltage. 13. The millimeter-wave power amplifier of claim 9 , wherein: the input transistor comprises a first input transistor and a second input transistor; and the cascode transistor comprises a first cascode transistor and a second cascode transistor, wherein the first input transistor has an output node coupled to a load path of the first cascode transistor, and the second input transistor has an output node coupled to a load path of the second cascode transistor. 14. The millimeter-wave power amplifier of claim 13 , further comprising: a first transformer having a first winding coupled between a control node of the first input transistor and a control node of the second input transistor, and a second winding configured to receive an RF input signal; and a second transformer coupled between the output node of the first cascode transistor and an output node of the second cascode transistor. 15. The millimeter-wave power amplifier of claim 9 , further comprising a current limiting circuit configured to limit the first DC bias current to a first predetermined limit current. 16. The millimeter-wave power amplifier of claim 9 , wherein the input transistor and the cascode transistor each comprise a bipolar junction transistor. 17. A millimeter-wave power amplifier comprising: a first signal path comprising a first input transistor, and a first cascode transistor having a first reference node coupled to a first output node of the first input transistor; a second signal path comprising a second input transistor, and a second cascode transistor having a second reference node coupled to a second output node of the second input transistor; a further cascode transistor configured to receive a reference current at a bias reference node; a first amplifier having a first input coupled to the bias reference node and a second input coupled to the first reference node of the first cascode transistor and to the second reference node of the second cascode transistor; and a first diode connected transistor coupled to an output of the first amplifier and coupled to a first control node of the first input transistor and a second control node of the second input transistor. 18. The millimeter-wave power amplifier of claim 17 , further comprising a current limiting circuit coupled between the output of the first amplifier and the first diode connected transistor. 19. The millimeter

Assignees

Inventors

Classifications

  • H03F1/0205Primary

    in transistor amplifiers · CPC title

  • with semiconductor devices only · CPC title

  • the amplifier being a low noise amplifier [LNA] · CPC title

  • the amplifier being a radio frequency amplifier · CPC title

  • H03F1/22Primary

    by use of cascode coupling, i.e. earthed cathode or emitter stage followed by earthed grid or base stage respectively · CPC title

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What does patent US11831279B2 cover?
In accordance with an embodiment, a method for operating a millimeter-wave power amplifier including an input transistor having an output node coupled to a load path of a cascode transistor includes: receiving a millimeter-wave transmit signal at a control node of the input transistor; amplifying the millimeter-wave transmit signal to form an output signal; providing the output signal to a load…
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H03F1/0205. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 28 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).