Methods and apparatus to improve performance of power path protection devices

Patent metadata

Field	Value
Publication number	US-11824345-B2
Application number	US-202017011522-A
Country	US
Kind code	B2
Filing date	Sep 3, 2020
Priority date	Sep 4, 2019
Publication date	Nov 21, 2023
Grant date	Nov 21, 2023

Abstract

An example integrated circuit includes: a substrate and a first metal fuse layer on the substrate, the first metal fuse layer having first and second electrical contacts, the first electrical contact adapted to be coupled to an input terminal, the second electrical contact adapted to be coupled to a diode. The example integrated circuit further includes a second metal fuse layer on the substrate, the second metal fuse layer having third and fourth electrical contacts, the third electrical contact coupled to the second electrical contact and adapted to be coupled to the diode, the fourth electrical contact coupled to a shunt circuit.

First claim

What is claimed is:

1. An integrated circuit comprising:
a shunt circuit having a shunt terminal;
a semiconductor substrate; and
a first metal layer and a second metal layer on the semiconductor substrate, the first metal layer including a first metal fuse coupled between an input terminal and a diode terminal, and the second metal layer including a second metal fuse coupled between the diode terminal and the shunt terminal.

2. The integrated circuit of claim 1 , further comprising an electronic fuse (eFuse) having an eFuse input and an eFuse output, the eFuse input coupled to the shunt terminal, and the eFuse output coupled to an output terminal.

3. The integrated circuit of claim 1 , wherein the shunt circuit includes:
a first switch and a second switch coupled between the shunt terminal and a ground terminal, in which the first switch has a first switch control terminal and includes a first diode having a first anode and a first cathode, the second switch has a second switch control terminal and includes a second diode having a second anode and a second cathode, the first anode is coupled to the shunt terminal, the first cathode is coupled to the second cathode, and the second anode is coupled to the ground terminal; and
a driver having a driver input and first and second driver outputs, the driver input coupled to the shunt terminal, the first driver output is coupled to the first switch control terminal, and the second driver output coupled to the second switch control terminal.

4. The integrated circuit of claim 3 , wherein the driver is configured to:
set the first driver output to a first state responsive to a voltage at the shunt terminal being below a negative threshold voltage; and
set the first driver output to a second state responsive to the voltage being above the negative threshold voltage; and
wherein the first switch is enabled responsive to the first driver output being in the first state, and the first switch is disabled responsive to the first driver output being in the second state.

5. The integrated circuit of claim 4 , wherein the driver is configured to:
set the second driver output to a first state responsive to a voltage at the shunt terminal being above a positive threshold voltage; and
set the second driver output to a second state responsive to the voltage being below the positive threshold voltage; and
wherein the second switch is enabled responsive to the second driver output being in the first state, and the second switch is disabled responsive to the second driver output being in the second state.

6. The integrated circuit of claim 5 , wherein the driver is configured to enable the second switch in a positive electrical over stress (EOS) event, and enable the first switch in a negative EOS event.

7. The integrated circuit of claim 5 , wherein the driver includes a first resistor, a third diode, and a fourth diode coupled between the shunt terminal and the ground terminal, in which the third diode has a third anode and a third cathode, the fourth diode has a fourth anode and a fourth cathode, the third cathode is coupled to the first resistor, the third anode is coupled to the ground terminal, the fourth anode is coupled to the third cathode, and the first resistor, the third diode, and the fourth diode are configured to provide a positive clamp voltage at the fourth cathode, and the positive threshold voltage is based on the positive clamp voltage; and
wherein the driver includes a second resistor, a fifth diode, a sixth diode, and a seventh diode coupled between the shunt terminal and the ground terminal, the fifth diode has a fifth anode and a fifth cathode, the sixth diode has a sixth anode and a sixth cathode, the seventh diode has a seventh anode and a seventh cathode, the fifth cathode is coupled to the shunt terminal, the fifth anode is coupled to the sixth anode, the second resistor is coupled between the sixth cathode and the ground terminal, the seventh anode coupled to the sixth cathode, the second resistor, the fifth diode, the sixth diode, and the seventh diode are configured to provide a negative clamp voltage at the seventh cathode, and the negative threshold voltage is based on the negative clamp voltage.

8. The integrated circuit of claim 5 , wherein the driver includes a resistor, a third diode, and a fourth diode coupled between the shunt terminal and the ground terminal, in which the third diode has a third anode and a third cathode, the fourth diode has a fourth anode and a fourth cathode, the third anode is coupled to the shunt terminal, the fourth anode is coupled to the ground terminal, the resistor is coupled between the third and fourth cathodes, and the resistor, the third diode, and the fourth diode are configured to provide a negative clamp voltage at the third cathode and a positive clamp voltage at the fourth cathode;
in which the negative threshold voltage is based on the negative clamp voltage and the positive threshold voltage is based on the positive clamp voltage.

9. The integrated circuit of claim 1 , wherein the first metal fuse is configured to conduct a surge current through the diode terminal.

10. An integrated circuit comprising:
a first switch;
a second switch coupled between the first switch and a ground terminal;
a third switch;
a fourth switch coupled between the third switch and an output terminal;
a first metal fuse coupled between an input terminal and a diode terminal; and
a second metal fuse coupled between the diode terminal and a first terminal of the first switch, and between the diode terminal and a second terminal of the second switch.

11. The integrated circuit of claim 10 , wherein:
the first switch includes a first diode having a first anode and a first cathode;
the second switch includes a second diode having a second anode and a second cathode;
the third switch includes a third diode having a third anode and a third cathode;
the fourth switch includes a fourth diode having a fourth anode and a fourth cathode;
the first anode is coupled to the third anode and the second metal fuse;
the first cathode is coupled to the second cathode;
the second anode is coupled to the ground terminal;
the third cathode is coupled to the fourth cathode; and
the fourth anode is coupled to the output terminal.

12. The integrated circuit of claim 11 , wherein:
the first and second switches are part of a shunt circuit having a shunt terminal, in which the first and second switches are coupled between the shunt terminal and the ground terminal; and
the third and fourth switches are part of an eFuse coupled between the shunt terminal and the output terminal.

13. The integrated circuit of claim 12 , wherein:
the first switch has a first switch control terminal;
the second switch has a second switch control terminal; and
the shunt circuit includes a driver having a driver input and first and second driver outputs, the driver input coupled to the shunt terminal, the first driver output coupled to the first switch control terminal, and the second driver output coupled to the second switch control terminal.

14. The integrated circuit of claim 13 , wherein the driver is configured to:
set the first driver output to a first state responsive to a voltage at the shunt terminal being below a negative threshold voltage; and
set the first driver output to a second state responsive to the voltage being above the negative threshold voltage; and
wherein the first switch is enabled responsive to the first driver output being in the first state, and the first switch is disabled responsive to the first driver output being in the second st

Assignees

• Texas Instruments Inc

Inventors

• Ramadass Yogesh Kumar
• Radhakrishna Ujwal
• Morroni Jeffrey

Classifications

• H10W20/493

  Fuses, i.e. interconnections changeable from conductive to non-conductive · CPC title

• H02H7/20 Primary

  for electronic equipment (for converters H02H7/10; for electric measuring instruments G01R1/36; for DC voltage or current semiconductor regulators G05F1/569; for amplifiers H03F1/52; for electronic switching circuits H03K17/08) · CPC title

• H01L23/5256

  Electricity · mapped topic

• H03K17/6871

  the output circuit comprising more than one controlled field-effect transistor · CPC title

• H03K17/693 Primary

  Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors (logic circuits H03K19/00; code converters H03M5/00, H03M7/00) · CPC title