Minimizing impedance variation during passive phase shifting

Patent metadata

Field	Value
Publication number	US-11824273-B2
Application number	US-201916683472-A
Country	US
Kind code	B2
Filing date	Nov 14, 2019
Priority date	Nov 14, 2019
Publication date	Nov 21, 2023
Grant date	Nov 21, 2023

Abstract

An apparatus includes a plurality of transceiver circuits, each comprising one or more phase shifter circuits. The phase shifter circuits may be configured to make a phase change by switching at least one of a capacitance value and an inductance value in response to a control signal. A characteristic impedance and the phase of each phase shifter circuit are correlated such that after the phase change, a value of the characteristic impedance is maintained at a predefined value.

First claim

The invention claimed is:

1. An apparatus comprising:
a plurality of transceiver circuits, each transceiver circuit comprising a phase shifter circuit, wherein the phase shifter circuit includes an inductive-capacitive (LC) network that includes an inductor connected to a first capacitor and a second capacitor, and the phase shifter circuit is configured to:
receive a control signal; and
in response to the receipt of the control signal, switch the second capacitor into the phase shifter circuit to change a capacitance value of the LC network from a first capacitance value to a second capacitance value, wherein the change to the capacitance value of the LC network causes a phase shift to be performed by the phase shifter circuit,
wherein:
the first capacitance value prior to the change is a predetermined capacitance value of the first capacitor;
the second capacitance value subsequent to the change is a sum of the first capacitance value and a predetermined capacitance value of the second capacitor;
an inductance value of the inductor, the predetermined capacitance value of the first capacitor, and the predetermined capacitance value of the second capacitor, are predetermined based on a relationship between a characteristic impedance and a phase of the phase shifter circuit;
based on the predetermined inductance value, the predetermined capacitance value of the first capacitor, and the predetermined capacitance value of the second capacitor, and in response to the phase shift, the characteristic impedance of the phase shifter circuit is maintained at an original value in response to the change from the first capacitance value to the second capacitance value in order to reduce variation in input and output impedances of the phase shifter circuit;
the LC network is a first LC network;
the inductor in the first LC network is a first inductor;
the phase shifter circuit further includes a second LC network connected to the first LC network;
the second LC network includes a second inductor connected to a first pair of identical capacitors and a second pair of identical capacitors;
the second inductor is placed in shunt;
the first pair of identical capacitors and the second pair of capacitors are in series relative to input and output ports of the phase shifter circuit; and
the second pair of capacitors is parallel to the first pair of capacitors.

2. The apparatus according to claim 1 , wherein the phase shifter circuit is bidirectional.

3. The apparatus according to claim 1 , wherein the phase shifter circuit is implemented in at least one of a single-ended format and a differential format.

4. The apparatus according to claim 1 , wherein the (LC) network in the phase shifter circuit comprises one or more switches configured to switch the capacitance value from the first capacitance value to the second capacitance value, and the one or more switches are implemented using at least one of complementary metal oxide semiconductor (CMOS), field effect transistor (FET), and high electron mobility transistor (HEMT).

5. The apparatus according to claim 1 , wherein the first capacitor and the second capacitor are parallel capacitors configured to provide a plurality of phase shifts.

6. The apparatus according to claim 1 , wherein the first and second LC networks in the phase shifter circuit are among a plurality of LC networks, each LC network among the plurality of LC networks comprising at least one inductor and at least one capacitor.

7. The apparatus according to claim 1 , wherein the phase shifter circuit comprises a transformer.

8. The apparatus of claim 1 , wherein the phase shifter circuit is among a plurality of phase shifter circuits in a transceiver circuit of a radio-frequency (RF) transceiver system.

9. The apparatus of claim 1 , wherein the phase shifter circuit is among one of a transmission chain and a receiver chain of a transceiver circuit of a radio-frequency (RF) transceiver system.

10. The apparatus of claim 1 , wherein the phase shift is a phase change from a first phase value to a second phase value, and the second capacitance value varies with the first phase value.

11. The apparatus according to claim 1 , wherein the first capacitor and the second capacitor form a first set of parallel capacitors connected to a first terminal of the first inductor, and the LC network further comprises a third capacitor and a fourth capacitor that form a second set of parallel capacitors connected to a second terminal of the first inductor, wherein the first capacitor and third capacitor are identical, and the second capacitor and the fourth capacitor are identical.

Assignees

• Renesas Electronics America Inc

Inventors

• Abbasi Morteza
• Kanar Tumay
• Yanduru Naveen Krishna

Classifications

• H01Q3/2694 Primary

  using also variable phase-shifters (H01Q3/2688 takes precedence) · CPC title

• H01Q3/38 Primary

  the phase-shifters being digital · CPC title

• H03H2/005

  Coupling circuits between transmission lines or antennas and transmitters, receivers or amplifiers · CPC title

• H03H7/19

  Two-port phase shifters providing a predetermined phase shift, e.g. "all-pass" filters · CPC title

• H03H7/20

  Two-port phase shifters providing an adjustable phase shift · CPC title