Power amplifier output matching

US11817832B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11817832-B2
Application numberUS-202017137031-A
CountryUS
Kind codeB2
Filing dateDec 29, 2020
Priority dateJan 3, 2020
Publication dateNov 14, 2023
Grant dateNov 14, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor-on-insulator die can include a power amplifier configured to amplify a radio frequency input signal having a fundamental frequency. The die can further include an output matching circuit including first and second second-order harmonic rejection circuits configured to resonate at about two times the fundamental frequency and a third order harmonic rejection circuit configured to resonate at about three times the fundamental frequency.

First claim

Opening claim text (preview).

What is claimed is: 1. A power amplifier system comprising: a semiconductor-on-insulator die; a power amplifier implemented on the semiconductor-on-insulator die and configured to amplify a radio frequency input signal having a fundamental frequency, the power amplifier including an input configured to receive the radio frequency input signal and an output configured to provide an amplified radio frequency signal; and an output matching circuit implemented on the semiconductor-on-insulator die and including first, second, and third second-order harmonic rejection circuits configured to resonate at about two times the fundamental frequency, and including a third order harmonic rejection circuit configured to resonate at about three times the fundamental frequency, the first and second second-order harmonic rejection circuits being harmonic short circuits and the third second-order harmonic rejection circuit and the third-order harmonic rejection circuit being harmonic open circuits, the first second-order harmonic rejection circuit positioned between the output of the power amplifier and a power low supply voltage, the third-order harmonic rejection circuit positioned between the output of the power amplifier and a first node, the third second-order harmonic circuit positioned between the first node and a second node, and the second second-order harmonic circuit positioned between the second node and the power low supply voltage. 2. The power amplifier system of claim 1 further comprising biasing circuitry implemented on the die and configured to bias the power amplifier, and a switch implemented on the die and configured to control connection of signal paths to an antenna. 3. The power amplifier system of claim 1 wherein the power amplifier includes two field effect transistors arranged in a cascade configuration. 4. The power amplifier system of claim 1 wherein the third-order harmonic rejection circuit includes a capacitor and an inductor, and the inductor is implemented as a surface mount device on a module supporting the semiconductor-on-insulator die. 5. The power amplifier system of claim 4 wherein the first second-order harmonic rejection circuit includes a tunable bank of at least two capacitors. 6. The power amplifier system of claim 1 further comprising a biasing circuit including a decoupling capacitor and a choke inductor, the choke inductor embedded in a substrate of a module supporting the semiconductor-on-insulator die. 7. A semiconductor-on-insulator die comprising: a power amplifier configured to amplify a radio frequency input signal having a fundamental frequency, the power amplifier including an input configured to receive the radio frequency input signal and an output configured to provide an amplified radio frequency signal; and an output matching circuit including first and second second-order harmonic rejection circuits configured to resonate at about two times the fundamental frequency and a third order harmonic rejection circuit configured to resonate at about three times the fundamental frequency, and further including a third second-order harmonic rejection circuit, the first and second second-order harmonic rejection circuits being harmonic short circuits and the third second-order harmonic rejection circuit and the third-order harmonic rejection circuit being harmonic open circuits, the first second-order harmonic rejection circuit positioned between the output of the power amplifier and a power low supply voltage, the third-order harmonic rejection circuit positioned between the output of the power amplifier and a first node, the third second-order harmonic circuit positioned between the first node and a second node, and the second second-order harmonic circuit positioned between the second node and the power low supply voltage. 8. The die of claim 7 wherein the power amplifier includes two field effect transistors arranged in a cascade configuration. 9. The die of claim 7 wherein the die further includes biasing circuitry configured to bias the power amplifier, a switch configured to control connection of signal paths to an antenna, and a controller configured to control the power amplifier and the switch. 10. A mobile device comprising: a module including a semiconductor-on-insulator die mounted thereon, the die including a power amplifier configured to amplify a radio frequency input signal having a fundamental frequency, the power amplifier including an input configured to receive the radio frequency input signal and an output configured to provide an amplified radio frequency signal, the die further including an output matching circuit including first, second, and third second-order harmonic rejection circuits configured to resonate at about two times the fundamental frequency and a third order harmonic rejection circuit configured to resonate at about three times the fundamental frequency, the first and second second-order harmonic rejection circuits being harmonic short circuits and the third second-order harmonic rejection circuit and the third-order harmonic rejection circuit being harmonic open circuits, the first second-order harmonic rejection circuit positioned between the output of the power amplifier and a power low supply voltage, the third-order harmonic rejection circuit positioned between the output of the power amplifier and a first node, the third second-order harmonic circuit positioned between the first node and a second node, and the second second-order harmonic circuit positioned between the second node and the power low supply voltage; and a radio frequency antenna. 11. The mobile device of claim 10 wherein the radio frequency antenna is included on the module. 12. The mobile device of claim 10 further comprising a biasing circuit including a decoupling capacitor and a choke inductor, the decoupling capacitor implemented on the die and the choke inductor embedded in a substrate of the module. 13. The mobile device of claim 10 further wherein the third order harmonic rejection circuit includes a capacitor implemented on the die and a surface mounted inductor mounted on the module. 14. The power amplifier system of claim 1 further comprising an antenna-side switch implemented on the semiconductor-on-insulator die, coupled between the output matching circuit and an antenna, and configured to connect a transmit path that includes the power amplifier to the antenna. 15. The power amplifier system of claim 14 further comprising a transceiver-side switch implemented on the semiconductor-on-insulator die and coupled between the power amplifier and a transceiver. 16. The die of claim 7 further comprising an antenna-side switch implemented on the semiconductor-on-insulator die, coupled between the output matching circuit and an antenna, and configured to connect a transmit path that includes the power amplifier to the antenna. 17. The die of claim 16 further comprising a transceiver-side switch implemented on the semiconductor-on-insulator die and coupled between the power amplifier and a transceiver. 18. The mobile device of claim 10 further comprising an antenna-side switch implemented on the semiconductor-on-insulator die, coupled between the output matching circuit and the radio frequency antenna, and configured to connect a transmit path that includes the power amplifier to the radio frequency antenna. 19. The mobile device of claim 18 further comprising a transceiver and a transceiver-side switch, the transceiver-side switch implemented on the semiconductor-on-insulator die and cou

Assignees

Inventors

Classifications

  • H03F3/213Primary

    in integrated circuits · CPC title

  • H03F1/565Primary

    using inductive elements · CPC title

  • Portable transceivers · CPC title

  • Circuits · CPC title

  • A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier · CPC title

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What does patent US11817832B2 cover?
A semiconductor-on-insulator die can include a power amplifier configured to amplify a radio frequency input signal having a fundamental frequency. The die can further include an output matching circuit including first and second second-order harmonic rejection circuits configured to resonate at about two times the fundamental frequency and a third order harmonic rejection circuit configured to…
Who is the assignee on this patent?
Skyworks Solutions Inc
What technology area does this patent fall under?
Primary CPC classification H03F3/213. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 14 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).