Data error detection method and display device including the same

Patent metadata

Field	Value
Publication number	US-11816006-B2
Application number	US-202217740225-A
Country	US
Kind code	B2
Filing date	May 9, 2022
Priority date	Nov 2, 2021
Publication date	Nov 14, 2023
Grant date	Nov 14, 2023

Abstract

A display device includes: a first memory storing compensation data and a display driver integrated chip including a compensator converting the input image data into output image data based on the compensation data. The display driver integrated chip includes: a second memory receiving the compensation data from the first memory when the display device is power-on; a third memory included in the compensator, the third memory storing the compensation data received from the second memory; and an error detector detecting an error in the compensation data stored in the third memory by comparing the compensation data stored in the first memory with the compensation data stored in the third memory.

First claim

What is claimed is:

1. A display device comprising:
a host configured to provide input image data;
a first memory storing compensation data; and
a display driver integrated chip including a compensator converting input image data into output image data based on the compensation data,
wherein the display driver integrated chip includes:
a second memory receiving the compensation data from the first memory when the display device is power on;
a third memory included in the compensator, the third memory storing the compensation data received from the second memory; and
an error detector detecting an error in the compensation data stored in the third memory by comparing the compensation data stored in the first memory with the compensation data stored in the third memory.

2. The display device of claim 1 , wherein the error detector compares a first error correction code received from the first memory and a second error correction code generated based on the compensation data stored in the third memory in a predetermined cycle.

3. The display device of claim 2 , wherein the first error correction code is a first checksum of the compensation data stored in the first memory and the second error correction code is a second checksum of the compensation data stored in the third memory.

4. The display device of claim 3 , wherein, when the first checksum and the second checksum do not accord with each other, the error detector generates a data rewriting signal instructing the compensation data to be re-loaded from the first memory to the second memory.

5. The display device of claim 1 , wherein the error detector compares a first error correction code received from the first memory and a second error correction code generated based on the compensation data stored in the third memory in response to an error detection signal from the host.

6. The display device of claim 5 , wherein, when the host detects that an electro-static discharge has occurred in the display driver integrated chip, the host provides the error detection signal.

7. The display device of claim 1 , wherein the display driver integrated chip provides the output image data to a display panel a frame at a time.

8. The display device of claim 7 , wherein the frame includes a porch period in which the output image data is not provided.

9. The display device of claim 8 , wherein the third memory includes at least one buffer storing the compensation data.

10. The display device of claim 9 , wherein a size of the compensation data stored in the at least one buffer is set such that a time obtained by adding up a time required to calculate a second error correction code which is generated based on the compensation data stored in the third memory with respect to the compensation data written in the at least one buffer and a time required to re-load the compensation data from the first memory to be smaller than the porch period.

11. The display device of claim 10 , wherein the error detector performs both comparison of a first error correction code received from the first memory and a second error correction code generated based on the compensation data stored in the third memory and re-loading of the compensation data stored in the first memory in one porch period.

12. The display device of claim 9 , wherein a size of the compensation data stored in the at least one buffer is set such that a time required to calculate a second error correction code which is generated based on the compensation data stored in the third memory with respect to the compensation data written in the at least one buffer to be smaller than a frame period except the porch period.

13. The display device of claim 12 , wherein the error detector compares a first error correction code received from the first memory and a second error correction code generated based on the compensation data stored in the third memory in a first frame period, and performs re-loading of the compensation data stored in the first memory in a porch period included in a next frame of the first frame.

14. The display device of claim 9 , wherein the first memory calculates a first error correction code corresponding to a size of the compensation data stored in the buffer.

15. The display device of claim 1 , wherein the first memory is a nonvolatile memory device and each of the second memory and the third memory is a volatile memory device.

16. A data error detection method for a display panel comprising:
loading compensation data from a first memory to a second memory when the display device is power-on;
loading the compensation data from the second memory to a third memory included in a compensator; and
detecting an error in the compensation data stored in the third memory by comparing a first error correction code with respect to the compensation data stored in the first memory with a second error correction code with respect to the compensation data stored in the third memory.

17. The data error detection method of claim 16 , wherein the detecting the error in the compensation data stored in the third memory includes comparing the first error correction code and the second error correction code in a predetermined cycle.

18. The data error detection method of claim 17 , further comprising re-loading the compensation data from the first memory to the second memory when the first error correction code and the second error correction code do not accord with each other.

19. The data error detection method of claim 16 , wherein a frame which is displayed in the display panel includes a porch period in which output image data is not provided.

20. The data error detection method of claim 19 , wherein
the third memory includes at least one buffer storing the compensation data loaded to the third memory,
wherein a size of the compensation data stored in the at least one buffer is set such that a time obtained by adding up a time required to calculate the second error correction code with respect to the compensation data written in the buffer and a time required to re-load the compensation data from the first memory to be smaller than the porch period, or is set such that a time required to calculate the second error correction code with respect to the compensate data written in the buffer to be smaller than a frame period except the porch period.

Assignees

• Samsung Display Co Ltd

Inventors

• Kim Sang Kuk

Classifications

• G06F11/162 Primary

  Displays · CPC title

• G06F11/0772

  Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers · CPC title

• G06F11/1004 Primary

  to protect a block of data words, e.g. CRC or checksum (G06F11/1076 takes precedence; security arrangements for protecting computers or computer systems against unauthorized activity G06F21/00) · CPC title

• G06F11/327

  Alarm or error message display · CPC title

• G09G3/3208 Primary

  organic, e.g. using organic light-emitting diodes [OLED] · CPC title