Display apparatus including conductive pattern in substrate and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-11812644-B2
Application number	US-202117142220-A
Country	US
Kind code	B2
Filing date	Jan 5, 2021
Priority date	Feb 28, 2017
Publication date	Nov 7, 2023
Grant date	Nov 7, 2023

Abstract

A display apparatus includes a display region and a peripheral region adjacent to the display region. The display apparatus further includes a first flexible substrate (FFS), a driving circuit (DC), a conductive pattern (CP), a conductive line, a light-emitting device, and a support substrate. The FFS includes a first surface and a second surface opposite the first surface. The second surface includes, in the peripheral region, a cavity extending into the FFS. The DC is on the first surface and includes at least one transistor. The CP is in the cavity and is partially exposed by the cavity. The conductive line electrically connects the CP to the DC. The light-emitting device is in the display region and is electrically connected to the DC. The support substrate is on the second surface. In a view normal to the second surface, the support substrate is spaced apart from the CP.

First claim

What is claimed is:

1. A display apparatus comprising:
a conductive pattern comprising a top surface, a bottom surface opposite to the top surface, and a lateral surface connecting the top surface to the bottom surface;
a first adhesion layer covering the top surface and the lateral surface of the conductive pattern;
a first substrate on the first adhesion layer;
a driving circuit over the first substrate, the driving circuit comprising at least one transistor;
a light-emitting device configured to be driven by the driving circuit;
a contact hole formed in the first adhesion layer and the first substrate to partially expose the top surface of the conductive pattern;
a conductive line over the first substrate, the conductive line electrically connecting the driving circuit to the conductive pattern through the contact hole; and
a second substrate under the first adhesion layer, the second substrate exposing the bottom surface of the conductive pattern.

2. The display apparatus of claim 1 , further comprising:
a second adhesion layer disposed between the second substrate and the first adhesion layer.

3. The display apparatus of claim 2 , wherein the second adhesion layer exposes the bottom surface of the conductive pattern.

4. The display apparatus of claim 2 , wherein the first adhesion layer extends from the lateral surface of the conductive pattern and directly contacts a top surface of the second adhesion layer.

5. The display apparatus of claim 1 , wherein the first substrate comprises polyimide.

6. The display apparatus of claim 1 , wherein the second substrate comprises polyimide.

7. The display apparatus of claim 1 , wherein the first adhesion layer comprises SiNx or A-Si:H.

8. The display apparatus of claim 1 , wherein conductive line comprises a layer comprising copper.

9. The display apparatus of claim 8 , wherein conductive line further comprises a layer comprising titanium.

10. The display apparatus of claim 1 , further comprising:
a connector under the conductive pattern; and
a conductive adhesive between the conductive pattern and the connector.

11. The display apparatus of claim 10 , further comprising:
a flexible printed circuit board connected to the connector,
wherein a portion of the flexible printed circuit board overlaps the second substrate.

12. The display apparatus of claim 11 , further comprising:
an electronic chip on the flexible printed circuit board,
wherein the electronic chip overlaps the second substrate.

Assignees

• Samsung Display Co Ltd

Inventors

• Seo Kiseong
• Ryu Jekil
• Choe Wonkyu
• Choi Jungho
• Kim Mugyeom
• Jeong Changyong

Classifications

• H10K59/131 Primary

  Interconnections, e.g. wiring lines or terminals · CPC title

• H10D86/441 Primary

  Interconnections, e.g. scanning lines · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• H10D86/40

  characterised by multiple TFTs · CPC title

• H10D86/0214

  using temporary substrates · CPC title