Optoelectronic component, optoelectronic component group in buffer layer opening and production method for same

Patent metadata

Field	Value
Publication number	US-11804568-B2
Application number	US-201916980859-A
Country	US
Kind code	B2
Filing date	Apr 26, 2019
Priority date	Apr 30, 2018
Publication date	Oct 31, 2023
Grant date	Oct 31, 2023

Abstract

Optoelectronic components, groups of optoelectronic components, and methods for producing a component or a plurality of optoelectronic components are provided. The method may include providing a growth substrate having a buffer layer arranged thereon. The buffer layer may be structured in such a way that it has a plurality of the openings which are spaced apart from one another in lateral directions. A plurality of semiconductor bodies may be formed in the openings, wherein in the areas of the openings, the buffer layer has subregions which are arranged in a vertical direction between the growth substrate and the semiconductor bodies. The growth substrate may be detached from the semiconductor bodies. The buffer layer may be removed at least in the areas of the subregions.

First claim

The invention claimed is:

1. A method for producing a plurality of optoelectronic components each comprising a semiconductor body having a first semiconductor layer, a second semiconductor layer, and an active zone located therebetween, the method comprising:
providing a growth substrate having a buffer layer arranged thereon;
structuring the buffer layer so that it has a plurality of openings which are spaced apart from each other in lateral directions;
forming a plurality of the semiconductor bodies in the plurality of openings, wherein in the areas of the plurality of openings, the buffer layer has subregions which are arranged in a vertical direction between the growth substrate and the plurality of semiconductor bodies; and
detaching the growth substrate from the plurality of semiconductor bodies, wherein the buffer layer is removed at least in the subregions.

2. The method according to claim 1 ,
wherein the plurality of semiconductor bodies and the buffer layer are based on a same compound semiconductor material, wherein
before providing the growth substrate having the buffer layer arranged thereon, the buffer layer is applied to the growth substrate using an epitaxy method, and
after the structuring of the buffer layer, the plurality of semiconductor bodies are applied to the subregions of the buffer layer in the plurality of openings using a further epitaxy method.

3. The method according to claim 1 ,
wherein the plurality of semiconductor bodies each have a vertical height and the plurality of openings each have a vertical depth, wherein a ratio of the vertical height of one semiconductor body of the plurality of semiconductor bodies to the vertical depth of an opening of the plurality of openings corresponding to the one semiconductor body is between 0.5 and 10 inclusive.

4. The method according to claim 1 ,
wherein a lateral cross-section of one semiconductor body of the plurality of semiconductor bodies and a lateral cross-section of an opening of the plurality of openings corresponding to the one semiconductor body have the same geometry.

5. The method according to claim 1 ,
wherein the plurality of semiconductor bodies and the buffer layer are based on a semiconductor material having a hexagonal wurtzite crystal structure, wherein at least one vertical side surface or all vertical side surfaces of the semiconductor bodies and/or of the openings run parallel to an m-face or to an a-face of the hexagonal wurtzite crystal structure of the semiconductor material.

6. The method according to claim 1 ,
wherein in a plan view of the growth substrate, the plurality of semiconductor bodies are grown separately from one another on the buffer layer exclusively within the openings.

7. The method according to claim 1 ,
wherein, before the plurality of semiconductor bodies are formed, a cover layer is formed on the buffer layer in a structured manner such that
outside the plurality of openings, the cover layer completely covers the buffer layer,
side surfaces of the plurality of openings are formed by side surfaces of the buffer layer, wherein the side surfaces of the plurality of openings are completely covered by the cover layer, and
the plurality of openings have bottom surfaces which are not covered or only partially covered by the cover layer at their edges,

wherein the plurality of semiconductor bodies are grown subsequently on the bottom surfaces of the plurality of openings which are not covered or exposed from the cover layer.

8. The method according to claim 1 ,
wherein the first semiconductor layer is formed in such a way that it has a surface which faces away from the growth substrate and is curved or angled in order to increase its overall surface area, wherein the active zone is formed on the first semiconductor layer and follows a contour of a surface of the first semiconductor layer.

9. The method according to claim 1 ,
wherein, before the growth substrate is detached, the plurality of semiconductor bodies are mechanically connected to a common carrier by a connection layer, wherein
the plurality of semiconductor bodies are arranged in a vertical direction between the common carrier and the growth substrate, and
directly after detaching the growth substrate and after removing subregions of the buffer layer, a component group comprising the plurality of optoelectronic components is formed on the common carrier.

10. The method according to claim 9 ,
wherein the component group is singulated along separating lines into individual components or into groups of individual components, wherein the separating lines run between the plurality of semiconductor bodies and are spaced apart from the plurality of semiconductor bodies.

11. The method according to claim 1 ,
wherein, before the growth substrate is detached, the plurality of semiconductor bodies are mechanically connected to a common carrier by a connection layer, wherein
the plurality of semiconductor bodies are arranged in a vertical direction between the common carrier and the growth substrate,
the connection layer comprises a plurality of retaining elements disposed between the plurality of optoelectronic components and the common carrier, and
the plurality of retaining elements are formed as predetermined breaking points of the connection layer and release the plurality of optoelectronic components under mechanical load, so that the plurality of optoelectronic components are detachable from the common carrier and are therefore transferable.

12. The method according to claim 1 ,
wherein the buffer layer is completely removed and side surfaces of a respective semiconductor body are passivated with insulating layers.

13. A component group comprising a plurality of components, each of the plurality of components having a semiconductor body and a buffer layer, wherein:
the semiconductor body comprises a first semiconductor layer, a second semiconductor layer, and an active zone located therebetween,
the semiconductor body and the buffer layer are based on a same compound semiconductor material,
the buffer layer has an opening, wherein in a plan view, the semiconductor body is arranged in the opening,
the buffer layer laterally surrounds the semiconductor body and is electrically insulated from the semiconductor body,
the buffer layers of the plurality of components form a common buffer layer which is continuous and has a plurality of the openings, and each of the semiconductor bodies of the plurality of components is arranged in one of the plurality of openings,
the plurality of components are individually electrically connectable,
the plurality of components are fixed to a common carrier by a connection layer, the connection layer comprising a plurality of retaining elements disposed between the plurality of components and the common carrier, and
the plurality of retaining elements are formed as predetermined breaking points of the connection layer and release the plurality of components under mechanical load, so that the plurality of components are detachable from the common carrier and are therefore transferable.

14. The component group according to claim 13 ,
wherein the semiconductor body of each of the plurality of components is grown in one of the openings and has side surfaces which are free of singulation tracks or structuring tracks.

15. The component group according to claim 13 ,
wherein the buffer layer of each of the plurality of components has side surfaces which face the semiconductor body and are formed to be radiation-reflective.

16. The component group accord

Assignees

• Osram Oled Gmbh

Inventors

• Hartmann Rainer
• Vierheilig Clemens
• Meyer Tobias
• Rueckerl Andreas
• Schimpke Tilman
• Binder Michael

Classifications

• H10W90/00

  Package configurations · CPC title

• H10H20/857

  Interconnections, e.g. lead-frames, bond wires or solder balls · CPC title

• H10H20/815

  having stress relaxation structures, e.g. buffer layers · CPC title

• H10H20/01

  Manufacture or treatment · CPC title

• H10H20/018 Primary

  Bonding of wafers · CPC title