Solar panel

Patent metadata

Field	Value
Publication number	US-11804565-B2
Application number	US-202217707326-A
Country	US
Kind code	B2
Filing date	Mar 29, 2022
Priority date	Aug 18, 2015
Publication date	Oct 31, 2023
Grant date	Oct 31, 2023

Abstract

A high efficiency configuration for a solar cell module comprises solar cells arranged in an overlapping shingled manner and conductively bonded to each other in their overlapping regions to form super cells, which may be arranged to efficiently use the area of the solar module. Rear surface electrical connections between solar cells in electrically parallel super cells provide alternative current paths (i.e., detours) through the solar module around damaged, shaded, or otherwise underperforming solar cells.

First claim

What is claimed is:

1. A solar module comprising:
a first, second, and third super cell arranged in physically parallel rows, each super cell comprising a plurality of crystalline silicon solar cells, each crystalline silicon solar cell having a front surface metallization pattern on a front surface and a rear surface metallization pattern on a rear surface to provide electrical contact to opposite sides of the crystalline silicon solar cell;
wherein the plurality of crystalline silicon solar cells in each super cell are arranged in an overlapping shingled manner and conductively bonded to each other in a region in which they overlap to electrically connect the crystalline silicon solar cells in series;
a first and second terminal electrical interconnect located at a first and second end of the solar module, respectively, and electrically connecting the first, second, and third super cells in parallel;
a first detour electrical interconnect arranged to extend along a first line perpendicular to the first, second, and third super cells arranged in physically parallel rows, the first detour electrical interconnect electrically connecting the rear surface metallization patterns on the rear surfaces of crystalline silicon solar cells in the first, second, and third super cells located along the first line;
a second detour electrical interconnect arranged to extend along a second line perpendicular to the first, second, and third super cells arranged in physically parallel rows, the second detour electrical interconnect electrically connecting the rear surface metallization patterns on the rear surfaces of crystalline silicon solar cells in the first, second, and third super cells located along the second line;
a junction box containing a bypass diode;
a first return conductor electrically connecting the first detour electrical interconnect to the bypass diode in the junction box; and
a second return conductor electrically connecting the second detour electrical interconnect to the bypass diode in the junction box, the second return conductor crossing the first line, the second return conductor separate from the first return conductor.

2. The solar module of claim 1 , wherein the first and second detour electrical interconnects are spaced apart from each other at equal intervals along the solar module.

3. The solar module of claim 1 , wherein the junction box provides a single positive or negative output for the solar module.

4. The solar module of claim 1 comprising a second bypass diode, wherein the junction box contains the second bypass diode.

5. The solar module of claim 4 , comprising a third return conductor, the third return conductor electrically connecting the first terminal electrical interconnect to the second bypass diode in the junction box.

6. The solar module of claim 5 , wherein the first return conductor is electrically connected to the second bypass diode.

7. The solar module of claim 1 , wherein each detour electrical interconnect is or comprises a conductive ribbon electrically connected to the rear surface metallization pattern on the rear surface of a crystalline silicon solar cell in each row.

8. The solar module of claim 1 , wherein the rear surface metallization pattern of each crystalline silicon solar cell comprises a rear detour interconnect contact pad on the rear surface of the crystalline silicon solar cell.

9. The solar module of claim 8 , wherein the rear detour interconnect contact pad is elongated in a direction parallel to a short side of the crystalline silicon solar cell.

10. The solar module of claim 1 , wherein the bypass diode is connected in parallel to 22 or more crystalline silicon solar cells in the first super cell.

11. The solar module of claim 1 , wherein the bypass diode is connected in parallel to 26 or more crystalline silicon solar cells in the first super cell.

12. The solar module of claim 1 , wherein the first, second, and third super cells each contain 80 or more crystalline silicon solar cells arranged in an overlapping shingled manner and conductively bonded to each other.

13. The solar module of claim 1 , wherein the solar module contains only three bypass diodes.

14. The solar module of claim 12 , wherein the solar module contains only three bypass diodes.

15. The solar module of claim 6 , wherein the bypass diode is connected in parallel to 22 or more crystalline silicon solar cells in the first super cell.

16. The solar module of claim 15 , wherein the junction box provides a single positive or negative output for the solar module.

17. The solar module of claim 16 , wherein the first, second, and third super cells each contain 80 or more crystalline silicon solar cells arranged in an overlapping shingled manner and conductively bonded to each other.

18. The solar module of claim 17 , wherein the solar module contains only three bypass diodes.

Assignees

• Maxeon Solar Pte Ltd

Inventors

• Morad Ratson
• Almogy Gilad
• Lance Tamir
• Beckett Nathan

Classifications

• H10F19/70 Primary

  comprising bypass diodes (bypass diodes in a junction box H02S40/34) · CPC title

• H10F19/902 Primary

  for series or parallel connection of photovoltaic cells · CPC title

• H01L31/0504 Primary

  Electricity · mapped topic

• H01L31/044

  Electricity · mapped topic

• H02S20/25

  Roof tile elements · CPC title