Semiconductor device with polymer-based insulating material and method of producing thereof

Patent metadata

Field	Value
Publication number	US-11804432-B2
Application number	US-202117173863-A
Country	US
Kind code	B2
Filing date	Feb 11, 2021
Priority date	Feb 11, 2021
Publication date	Oct 31, 2023
Grant date	Oct 31, 2023

Abstract

A semiconductor device includes a semiconductor substrate having a first main surface and a metal structure above the first main surface. The metal structure has a periphery region that includes a transition section along which the metal structure transitions from a first thickness to a second thickness less than the first thickness. A polymer-based insulating material contacts and covers at least the periphery region of the metal structure. A thickness of the polymer-based insulating material begins to increase on a first main surface of the metal structure that faces away from the semiconductor substrate and continues to increase in a direction towards the transition section. An average slope of a surface of the polymer-based insulating material which faces away from the semiconductor substrate, as measured with respect to the first main surface of the metal structure, is less than 60 degrees along the periphery region of the metal structure.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a semiconductor substrate having a first main surface;
an electrically conductive structure above the first main surface of the semiconductor substrate, the electrically conductive structure having a periphery region that includes a transition section along which the electrically conductive structure transitions from a first thickness to a second thickness less than the first thickness; and
a polymer-based insulating material in contact with and covering at least the periphery region of the metal structure,
wherein a thickness of the polymer-based insulating material begins to increase on a first main surface of the electrically conductive structure that faces away from the semiconductor substrate and continues to increase in a direction towards the transition section of the electrically conductive structure,
wherein an average slope of a surface of the polymer-based insulating material which faces away from the semiconductor substrate, as measured with respect to the first main surface of the electrically conductive structure, is less than 60 degrees along the periphery region of the electrically conductive structure.

2. The semiconductor device of claim 1 , wherein the average slope of the polymer-based insulating material is less than 45 degrees.

3. The semiconductor device of claim 1 , wherein the average slope of the polymer-based insulating material is less than 35 degrees.

4. The semiconductor device of claim 1 , wherein the average slope of the polymer-based insulating material is less than 20 degrees.

5. The semiconductor device of claim 1 , wherein the semiconductor device is a power transistor, wherein the electrically conductive structure is at a source potential and laterally separated from an additional electrically conductive structure which is at a second potential that is different from the source potential, and wherein the polymer-based insulating material covers the additional electrically conductive structure.

6. The semiconductor device of claim 1 , wherein the polymer-based insulating material is a polyimide.

7. The semiconductor device of claim 1 , wherein the polymer-based insulating material has undulations over the transition section of the electrically conductive structure.

8. A semiconductor device, comprising:
a semiconductor substrate having a first main surface;
a first electrically conductive structure above the first main surface of the semiconductor substrate, the first electrically conductive structure having a region;
a polymer-based insulating material in contact with and covering at least the region of the first electrically conductive structure, wherein a thickness of the polymer-based insulating material begins to increase on a first main surface of the first electrically conductive structure that faces away from the semiconductor substrate, wherein an average slope of a surface of the polymer-based insulating material which faces away from the semiconductor substrate, as measured with respect to the first main surface of the first electrically conductive structure, is less than 60 degrees along the region of the first electrically conductive structure; and
a second electrically conductive structure above the polymer-based insulating material.

9. The semiconductor device of claim 8 , wherein the semiconductor device is a power transistor, wherein the first electrically conductive structure is at a source potential, and wherein the second electrically conductive structure contacts the first electrically conductive structure outside the region of the first electrically conductive structure that is in contact with and covered by the polymer-based insulating material.

10. The semiconductor device of claim 8 , wherein the polymer-based insulating material is a polyimide.

11. A method of producing a semiconductor device, the method comprising:
forming a electrically conductive structure above a first main surface of a semiconductor substrate, the electrically conductive structure having a periphery region that includes a transition section along which the electrically conductive structure transitions from a first thickness to a second thickness less than the first thickness;
forming a polymer-based insulating material on at least the periphery region of the electrically conductive structure;
varying a degree of polymer cross-linking within the polymer-based insulating material along the periphery region of the electrically conductive structure, such that the degree of the polymer cross-linking increases with increasing thickness of the polymer-based insulating material; and
after varying the degree of the polymer cross-linking, curing the polymer-based insulating material.

12. The method of claim 11 , wherein varying the degree of the polymer cross-linking comprises:
applying grayscale lithography to a region with increasing thickness of the polymer-based insulating material.

13. The method of claim 12 , wherein applying the grayscale lithography to the region with increasing thickness of the polymer-based insulating material comprises:
forming a photolithographic mask on the polymer-based insulating material, the photolithographic mask comprising a grayscale zone disposed over the region with increasing thickness of the polymer-based insulating material and having a plurality of shapes; and
directing light towards the photolithographic mask,
wherein the plurality of shapes in the grayscale zone of the photolithographic mask block some of the light from reaching the region with increasing thickness of the polymer-based insulating material.

14. The method of claim 13 , wherein at least one of a size of the shapes in the grayscale zone of the photolithographic mask or a spacing between the shapes in the grayscale zone of the photolithographic mask varies with increasing thickness of the polymer-based insulating material.

15. The method of claim 14 , wherein the size of the shapes is in a range of a sub-resolution of the polymer-based insulating material.

16. The method of claim 13 , wherein forming the photolithographic mask comprises:
sputtering a chromium layer on a glass substrate; and
etching the shapes into the chromium layer.

17. The method of claim 13 , wherein forming the photolithographic mask comprises:
sputtering a plurality of chromium layers of different thicknesses on a glass substrate.

18. The method of claim 11 , wherein the semiconductor device is a power transistor, wherein the electrically conductive structure is at a source potential and laterally separated from an additional electrically conductive structure which is at a second potential that is different from the source potential, and wherein the polymer-based insulating material covers the additional electrically conductive structure.

19. The method of claim 18 , further comprising:
forming a metallization layer or layer stack over the electrically conductive structure and over the additional electrically conductive structure,
wherein the metallization layer or layer stack contacts the electrically conductive structure,
wherein the additional electrically conductive structure is insulated from the metallization layer or layer stack by the polymer-based insulating material.

20. The method of claim 11 , wherein forming the polymer-based insulating material comprises:
forming one or more polyimide layers on the periphery region of the electrically conductive structure.

Assignees

• Infineon Technologies Ag

Inventors

• Zundel Markus
• Ananiev Sergey
• Behrendt Andreas
• Doepke Holger
• Schmalzbauer Uwe
• Sorger Michael
• Thurmer Dominic

Classifications

• H10P14/6686

  the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane · CPC title

• H10P14/6322

  Formation by thermal treatments (formation by plasma treatment H10P14/6319) · CPC title

• H10W20/098

  by filling between adjacent conductive parts · CPC title

• H10W20/095

  by irradiating with electromagnetic or particle radiation (plasma treatment H10W20/096) · CPC title

• H10W20/48

  Insulating materials thereof · CPC title