Multilayer ceramic electronic device and method for manufacuting same

US11798745B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11798745-B2
Application numberUS-202016928425-A
CountryUS
Kind codeB2
Filing dateJul 14, 2020
Priority dateJul 16, 2019
Publication dateOct 24, 2023
Grant dateOct 24, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A multilayer ceramic electronic device includes a ceramic functional part having a generally rectangular shape in which a plurality of ceramic dielectric layers and a plurality of internal electrodes are laminated alternately in a vertical direction; a pair of cover parts that cover the functional part from top and bottom, respectively; and a pair of side margin parts covering side surfaces of the functional part, respectively, wherein an end portion of an uppermost internal electrode among the plurality of internal electrodes is curved downward to satisfy a≥1 μm and 0.1≤a/b≤0.4, where a is a dimension of the curved end portion in the vertical direction in a cross section taken along a plane perpendicular to the side surfaces, and b is a dimension of the curved end portion in a horizontal direction in said cross section.

First claim

Opening claim text (preview).

What is claimed is: 1. A multilayer ceramic electronic device, comprising: a ceramic functional part having a generally rectangular shape in which a plurality of ceramic dielectric layers and a plurality of internal electrodes are laminated alternately in a vertical direction; a pair of cover parts that cover the functional part from top and bottom, respectively; and a pair of side margin parts covering side surfaces of the functional part, respectively, wherein in a plan view, an uppermost internal electrode among the plurality of internal electrodes spans an entire width of the functional part, and has an end portion reaching and terminating at one of the side surfaces of the functional par that are covered by the side margin parts, the end portion being curved downward to satisfy 2 μm≤a≤20 μm, 20 μm≤b≤50 μm and 0.1≤a/b≤0.4, where a is a dimension of the curved end portion in the vertical direction in a cross section taken along a plane perpendicular to the side surfaces, and b is a dimension of the curved end portion in a horizontal direction in said cross section, and wherein in the plan view, a lowermost internal electrode among the plurality of internal electrodes spans the entire width of the functional part, and has an end portion reaching and terminating at one of the side surfaces of the functional part that are covered by the side margin parts, the end portion of the lowermost internal electrode being curved upward to satisfy 2 μm ≤a′ <20 μm, 20 μm≤b′≤50 μm and 0.1 ≤a′/b′ <0.4, where a′ is a dimension of the curved end portion of the lowermost internal electrode in the vertical direction in the cross section taken along the plane perpendicular to the side surfaces, and b′ is a dimension of the curved end portion of the lowermost internal electrode in the horizontal direction in said cross section, wherein a top surface of each of the pair of side margin parts has a curved end portion that is curved downwardly in parallel to the vertical direction, and a bottom surface of each of the pair of side margin parts has a curved end portion that is curved upwardly in parallel to the vertical direction, the curved end portions of the uppermost internal electrode and the lowermost internal electrode respectively being less curved than the curved end portions of each of the pair of side margin parts, wherein the plurality of internal electrodes respectively have end portions that reach and terminate at the side surfaces of the functional part, and the end portions thereof are curved progressively greatly downwardly or upwardly towards the uppermost internal electrode and the lowermost internal electrode, respectively, and wherein the plurality of internal electrodes respectively have other end portions that reach and terminate at one of end surfaces of the functional part that are orthogonal to the side surfaces thereof, said other end portions of the plurality of internal electrodes being substantially horizontally flat, having no curved portion in the vertical direction. 2. The multilayer ceramic electronic device according to claim 1 , wherein a thickness of the side margin parts is equal to or greater than 10 μm and less than or equal to 15 μm. 3. The multilayer ceramic electronic device according to claim 2 , wherein the thickness of the side margin parts is equal to or less than 12 μm. 4. The multilayer ceramic electronic device according to claim 1 , wherein said uppermost electrode has said curved end portion on both sides of the uppermost electrodes. 5. The multilayer ceramic electronic device according to claim 1 , wherein said uppermost electrode has said curved end portion on both sides of the uppermost electrodes, and said lowermost electrode has said curved end portion on both sides of the lowermost electrodes. 6. The multilayer ceramic electronic device according to claim 1 , wherein the end portion of the uppermost internal electrode is curved downward to satisfy 8 μm ≤a≤20 μm and 0.32 ≤a/b≤0.4, and the end portion of the lowermost internal electrode is curved upward to satisfy 8 μm ≤a′ ≤20 μm and 0.32≤a′/b′≤0.4. 7. A method for manufacturing a plurality of multilayer ceramic electronic devices, comprising: forming laminated sheets by laminating, alternately in a vertical direction, a plurality of first ceramic sheets, each having a plurality of internal electrode formed thereon, and a plurality of second ceramic sheets, each having a plurality of internal electrode formed thereon, and by laminating a plurality of third ceramic sheets on a top and a bottom of the laminated first and second ceramic sheets; pressure-joining the laminated sheets in the vertical direction by sandwiching the laminated sheets by a pair of elastic sheets having a plurality of protrusions at fixed intervals from top and bottom so as to push and deform inwardly regions in the first and second ceramic sheets that do not have the internal electrodes; cutting the pressure-joined laminated sheets into a plurality of laminated chips, the cutting including removing the said regions in the first and second ceramic sheets that have been pushed and deformed inwardly, thereby forming cut side surfaces in each of the laminated chips, each of the laminated chips thereby having a plurality of the internal electrodes superimposed in the vertical direction; for each of the laminated chips, attaching side margin parts to said cut side surfaces; and thereafter, sintering the laminated chips with the side margin parts, wherein in each of the sintered laminated chips with the side margin parts, in a plan view, an uppermost internal electrode among the plurality of internal electrodes spans an entire width of the laminated chip, and has an end portion reaching and terminating at one of the cut side surfaces of the laminated chip that are covered by the side margin parts, the end portion being curved downward to satisfy 2 μm ≤a≤20 μm, 20 μm≤b ≤50 μm and 0.1≤a/b≤0.4, where a is a dimension of the curved end portion in the vertical direction in a cross section taken along a plane perpendicular to the cut side surfaces, and b is a dimension of the curved end portion in a horizontal direction in said cross section, wherein in each of the sintered laminated chips with the side margin parts, in a plan view, a lowermost internal electrode among the plurality of internal electrodes spans the entire width of the laminated chip, and has an end portion reaching and terminating at one of the cut side surfaces of the laminated chip that are covered by the side margin parts, the end portion being curved upward to satisfy 2 μm ≤a′≤20 μm, 20 μm≤b′≤50 μm and 0.1≤a′/b′ ≤0.4, where a′ is a dimension of the curved end portion of the lowermost internal electrode in the vertical direction in the cross section taken along the plane perpendicular to the cut side surfaces, and b′ is a dimension of the curved end portion of the lowermost internal electrode in the horizontal direction in said cross section, wherein a top surface of each of the pair of side margin parts has a curved end portion that is curved downwardly in parallel to the vertical direction, and a bottom surface of each of the pair of side margin parts has a curved end portion that is curved upwardly in parallel to the vertical direction, the curved end portions of the uppermost internal electrode and the lowermost internal electrode respectively being less curved than the curved end portions of each of the pair of side margin parts, wherein the plurality of internal electrodes respectively have end portions that reach and terminate at the side surfaces of the functional part, and the end portions thereof are curved progressively greatly downwardly or upwardly towards the uppermost internal electrode and the lowermost internal electrode, respectively, and wherein the

Assignees

Inventors

Classifications

  • H01G4/30Primary

    Stacked capacitors (H01G4/33 takes precedence) · CPC title

  • Ceramic dielectrics {(H01G4/085 takes precedence)} · CPC title

  • the terminals embracing or surrounding the capacitive element, e.g. caps (H01G4/252 takes precedence) · CPC title

  • H01G4/005Primary

    Electrodes · CPC title

  • H01G4/012Primary

    Form of non-self-supporting electrodes · CPC title

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What does patent US11798745B2 cover?
A multilayer ceramic electronic device includes a ceramic functional part having a generally rectangular shape in which a plurality of ceramic dielectric layers and a plurality of internal electrodes are laminated alternately in a vertical direction; a pair of cover parts that cover the functional part from top and bottom, respectively; and a pair of side margin parts covering side surfaces of …
Who is the assignee on this patent?
Taiyo Yuden Kk
What technology area does this patent fall under?
Primary CPC classification H01G4/30. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 24 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).