Display panel configured to display images and display device
US-11404674-B2 · Aug 2, 2022 · US
US11793030B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11793030-B2 |
| Application number | US-202117221912-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 5, 2021 |
| Priority date | Sep 16, 2020 |
| Publication date | Oct 17, 2023 |
| Grant date | Oct 17, 2023 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
The present disclosure relates to the field of display technology, and proposes a display panel, a manufacturing method thereof, and a display device. The display panel includes an array substrate, a plurality of sub-pixels, and a plurality of divergent lenses. The array substrate includes a plurality of switch units. The plurality of sub-pixels is arranged on the array substrate, where each sub-pixel includes a plurality of light-emitting components, each light-emitting component includes a driving electrode, the driving electrode is connected to the plurality of switch units, and a gap exists between the driving electrodes of two adjacent light-emitting components. Each divergent lens is arranged on a side of a respective gap away from the array substrate. An orthographic projection of the gap on the array substrate is located in an orthographic projection of the divergent lens on the array substrate.
Opening claim text (preview).
The invention claimed is: 1. A display panel, comprising: an array substrate comprising a plurality of switch units; a plurality of sub-pixels disposed on the array substrate, wherein each sub-pixel comprises a plurality of light-emitting components, each light-emitting component comprises a driving electrode, the driving electrode is connected to the plurality of switch units, and a gap exists between the driving electrodes of two adjacent light-emitting components; a plurality of divergent lenses, wherein each divergent lens is disposed on a side of a respective gap away from the array substrate, and an orthographic projection of the gap on the array substrate is located in an orthographic projection of the divergent lens on the array substrate; and a first planarization layer disposed on a side of the plurality of divergent lenses away from the array substrate, wherein each sub-pixel further comprises: a pixel definition layer disposed on a side of the driving electrodes of the plurality of light-emitting components away from the array substrate, wherein a second via hole is provided in the pixel definition layer to expose the driving electrodes of the plurality of light-emitting components; a light-emitting layer disposed in the second via hole and connected to the driving electrodes of the plurality of light-emitting components: a second electrode disposed on a side of the light-emitting layer away from the array substrate; and a group of protective layers disposed on a side of the second electrode away from the array substrate. 2. The display panel according to claim 1 , wherein a side of each divergent lens close to the array substrate is a flat surface and a side of each divergent lens away from the array substrate is an arc surface. 3. The display panel according to claim 1 , wherein in a thickness direction of the array substrate, a distance between a side of each divergent lens close to a respective driving electrode and a side of the respective driving electrode close to the divergent lens is greater than or equal to a focal length of the divergent lens. 4. The display panel according to claim 3 , wherein in the thickness direction of the array substrate, the distance between the side of each divergent lens close to the respective driving electrode and the side of the respective driving electrode close to the divergent lens is less than or equal to twice the focal length of the divergent lens. 5. The display panel according to claim 1 , wherein the light-emitting layer comprises a plurality of light-emitting parts and each light-emitting part is connected to the driving electrode of a respective light-emitting component. 6. The display panel according to claim 1 , wherein the group of protective layers comprises a group of encapsulation layers. 7. The display panel according to claim 1 , wherein an orthographic projection of each gap on the array substrate is located in a middle area of an orthographic projection of a respective divergent lens on the array substrate. 8. The display panel according to claim 1 , wherein the array substrate comprises: a base substrate; a buffer layer disposed on the base substrate: an active layer disposed on a side of the buffer layer away from the base substrate; a gate insulating layer disposed on a side of the active layer away from the base substrate, wherein a third via hole is provided in the gate insulating layer to expose the active layer; a gate electrode disposed on a side of the gate insulating layer away from the base substrate; an interlayer dielectric layer disposed on a side of the gate electrode away from the base substrate, wherein a fourth via hole, communicating with the third via hole, is provided in the interlayer dielectric layer; source and drain electrodes disposed on a side of the interlayer dielectric layer away from the base substrate, and connected to the active layer through the fourth via hole and the third via hole; and a second planarization layer disposed on a side of the source and drain electrodes away from the base substrate, wherein a plurality of first via holes is provided in the first planarization layer. 9. A manufacturing method for a display panel, comprising: providing an array substrate, wherein the array substrate comprises a plurality of switch units; forming a plurality of sub-pixels on the array substrate, wherein each sub-pixel comprises a plurality of light-emitting components, each light-emitting component comprises a driving electrode, the driving electrode is connected to the plurality of switch units, and a gap exists between the driving electrodes of two adjacent light-emitting components; forming a divergent lens on a side of each gap away from the array substrate, wherein an orthographic projection of the gap on the array substrate is located in an orthographic projection of the divergent lens on the array substrate; and forming a first planarization layer on a side of the divergent lens away from the array substrate, wherein each sub-pixel further comprises: a pixel definition layer disposed on a side of the driving electrodes of the plurality of light-emitting components away from the array substrate, wherein a second via hole is provided in the pixel definition layer to expose the driving electrodes of the plurality of light-emitting components; a light-emitting layer disposed in the second via hole and connected to the driving electrodes of the plurality of light-emitting components; a second electrode disposed on a side of the light-emitting layer away from the array substrate; and a group of protective layers disposed on a side of the second electrode away from the array substrate. 10. The manufacturing method according to claim 9 , wherein the divergent lens is formed by a nano-imprinting process. 11. A display device, comprising a display panel, wherein the display panel comprises: an array substrate comprising a plurality of switch units; a plurality of sub-pixels disposed on the array substrate, wherein each sub-pixel comprises a plurality of light-emitting components, each light-emitting component comprises a driving electrode, the driving electrode is connected to the plurality of switch units, and a gap exists between the driving electrodes of two adjacent light-emitting components; a plurality of divergent lenses, wherein each divergent lens is disposed on a side of a respective gap away from the array substrate, and an orthographic projection of the gap on the array substrate is located in an orthographic projection of the divergent lens on the array substrate; and a first planarization layer disposed on a side of the plurality of divergent lenses away from the array substrate, wherein each sub-pixel further comprises: a pixel definition layer disposed on a side of the driving electrodes of the plurality of light-emitting components away from the array substrate, wherein a second via hole is provided in the pixel definition layer to expose the driving electrodes of the plurality of light-emitting components; a light-emitting layer disposed in the second via hole and connected to the driving electrodes of the plurality of light-emitting components; a second electrode disposed on a side of the light-emitting layer away from the array substrate; and a group of protective layers disposed on a side of the second electrode away from the array substrate. 12. The display device according to claim 11 , wherein a side of each divergent lens close to the array substrate is a flat surface and a side of each divergent lens away from the array substrate is an arc surface. 13. The display device according to claim 11
comprising refractive means, e.g. lenses · CPC title
Encapsulations · CPC title
comprising refractive means, e.g. lenses · CPC title
Two-dimensional arrangements, e.g. asymmetric LED layout · CPC title
Electricity · mapped topic
Related publications grouped by family.
Answers are generated from the same data shown on this page.