Apparatus for receiver with carrier frequency offset correction using phase and frequency information and associated methods

Patent metadata

Field	Value
Publication number	US-11770287-B2
Application number	US-202017138846-A
Country	US
Kind code	B2
Filing date	Dec 30, 2020
Priority date	Dec 30, 2020
Publication date	Sep 26, 2023
Grant date	Sep 26, 2023

Abstract

An apparatus includes a radio-frequency (RF) receiver for receiving an RF signal using a plurality of antennas. The RF receiver includes a demodulator to provide a switch signal to cause the RF receiver to use an antenna in the plurality of antennas. The RF receiver further includes a carrier frequency offset (CFO) correction circuit that uses an estimation of the carrier frequency offset and an estimation of phase differences to remove the carrier frequency offset.

First claim

The invention claimed is:

1. An apparatus, comprising:
a radio-frequency (RF) receiver for receiving an RF signal using a plurality of antennas, the RF receiver comprising:
a demodulator to provide a switch signal to cause the RF receiver to use one antenna in the plurality of antennas in an antenna diversity configuration;
a phase difference estimation (PDE) circuit to provide an estimation of phase differences, wherein the PDE circuit comprises a plurality of circuit branches, wherein each of the plurality of circuit branches comprises an averaging circuit, a phase to frequency converter circuit, a Coordinate Rotation Digital Computer (Cordic), and an exponentiation circuit; and
a carrier frequency offset (CFO) correction circuit that uses an estimation of the carrier frequency offset and the estimation of phase differences to remove the carrier frequency offset.

2. The apparatus according to claim 1 , wherein the CFO correction circuit comprises a CFO estimation circuit to provide the estimation of the carrier frequency offset.

3. The apparatus according to claim 2 , wherein the CFO correction circuit further comprises a phase difference removal (PDR) circuit coupled to the PDE circuit.

4. The apparatus according to claim 3 , wherein the CFO correction circuit further comprises a CFO removal circuit to remove the carrier frequency offset.

5. The apparatus according to claim 3 , wherein the PDR circuit comprises a first multiplier, a second multiplier, and a multiplexer to provide as an output either an output of the first multiplier, the output of the second multiplier, or an input of the PDR circuit.

6. The apparatus according to claim 2 , wherein the CFO estimation circuit comprises a first averaging circuit, a phase to frequency converter circuit coupled to the first averaging circuit, a second averaging circuit coupled to the phase to frequency converter circuit, a Coordinate Rotation Digital Computer (Cordic) coupled to the second averaging circuit, and an exponentiation circuit coupled to the Cordic.

7. The apparatus according to claim 6 , wherein the CFO removal circuit comprises a multiplier that multiplies in-phase (I) and quadrature (Q) input signals with an output of the CFO estimation circuit.

8. An apparatus, comprising:
a radio-frequency (RF) receiver for receiving an RF signal using a plurality of antennas, the RF receiver comprising:
a demodulator to provide a switch signal to cause the RF receiver to use one antenna in the plurality of antennas in an antenna diversity configuration; and
a phase difference estimation (PDE) circuit to provide an estimation of phase differences in a set of phase samples, wherein the PDE circuit comprises a plurality of circuit branches, wherein each of the plurality of circuit branches comprises an averaging circuit, a phase to frequency converter circuit, a Coordinate Rotation Digital Computer (Cordic), and an exponentiation circuit;
a phase difference removal (PDR) circuit to remove phase differences based on the estimation of the phase differences in the set of phase samples to generate an output signal;
a carrier-frequency-offset (CFO) estimation circuit to use the output signal of the PDR circuit to provide an estimation of a carrier frequency offset; and
a CFO removal circuit to use the estimation of the carrier frequency offset and the switch signal to remove the carrier frequency offset.

9. The apparatus according to claim 8 , wherein an input of the CFO removal circuit is coupled to an output of the CFO estimation circuit.

10. The apparatus according to claim 8 , wherein the output signal of the PDR circuit drives an input of the CFO estimation circuit.

11. The apparatus according to claim 8 , wherein the PDR circuit comprises a first multiplier, a second multiplier, and a multiplexer to provide as an output either an output of the first multiplier, the output of the second multiplier, or an input of the PDR circuit.

12. The apparatus according to claim 8 , wherein the CFO removal circuit comprises a multiplier that multiplies in-phase (I) and quadrature (Q) input signals with an output of the CFO estimation circuit.

13. The apparatus according to claim 8 , wherein the PDR circuit is coupled to the PDE circuit.

14. A method of correcting a carrier frequency offset (CFO) in a radio-frequency (RF) receiver using a plurality of antennas, the method comprising:
using a demodulator to provide a switch signal to cause the RF receiver to use one antenna in the plurality of antennas in an antenna diversity configuration; and
using a CFO correction circuit to estimate the carrier frequency offset by using the switch signal, and to remove the carrier frequency offset by using a phase difference estimation (PDE) circuit, wherein using the PDE circuit comprises using a plurality of circuit branches, and wherein each of the plurality of circuit branches comprises an averaging circuit, a phase to frequency converter circuit, a Coordinate Rotation Digital Computer (Cordic), and an exponentiation circuit.

15. The method according to claim 14 , wherein using the CFO correction circuit further comprises using a CFO estimation circuit to provide the estimation of the carrier frequency offset.

16. The method according to claim 15 , wherein the PDE circuit to provides an estimation of phase differences.

17. The method according to claim 16 , wherein using the CFO correction circuit further comprises using a phase difference removal (PDR) to remove phase differences.

18. The method according to claim 17 , wherein the PDR circuit comprises a first multiplier, a second multiplier, and a multiplexer to provide as an output either an output of the first multiplier, the output of the second multiplier, or an input of the PDR circuit.

19. The method according to claim 14 , wherein using the CFO correction circuit further comprises using a CFO removal circuit to remove the carrier frequency offset.

20. The method according to claim 19 , wherein the CFO removal circuit comprises a multiplier that multiplies in-phase (I) and quadrature (Q) input signals with an output of the CFO estimation circuit.

Assignees

• Silicon Lab Inc

Inventors

• Torrini Antonio
• De Ruijter Hendricus
• Zhou Yan
• Trager David

Classifications

• H04L27/2657 Primary

  Carrier synchronisation · CPC title

• H04L27/0014 Primary

  Carrier regulation (of chaotic carriers H04L27/001; for multicarrier receivers H04L27/2657) · CPC title

• H04L27/2675

  Pilot or known symbols · CPC title

• H04L2027/0026

  Correction of carrier offset · CPC title

• H04B7/10

  Polarisation diversity; Directional diversity · CPC title