Silicon carbide semiconductor device with cell section and outer periphery section

Patent metadata

Field	Value
Publication number	US-11769801-B2
Application number	US-202117477168-A
Country	US
Kind code	B2
Filing date	Sep 16, 2021
Priority date	Dec 12, 2016
Publication date	Sep 26, 2023
Grant date	Sep 26, 2023

Abstract

In a guard ring section of a silicon carbide semiconductor device, an electric field relaxation layer for relaxing an electric field is formed in a surface layer portion of a drift layer, so that electric field is restricted from penetrating between guard rings. Thus, an electric field concentration is relaxed. Accordingly, a SiC semiconductor device having a required withstand voltage is obtained.

First claim

What is claimed is:

1. A silicon carbide semiconductor device comprising:
a cell section; and
an outer peripheral section including a guard ring section surrounding an outer periphery of the cell section, wherein:
each of the cell section and the outer peripheral section includes:
a substrate having a first conductivity type or a second conductivity type;
a drift layer having the first conductivity type with an impurity concentration lower than the substrate, and arranged on a top surface side of the substrate; and
a current dispersion layer having the first conductivity type with an impurity concentration higher than the drift layer, and arranged on the drift layer;

the cell section further includes a vertical semiconductor element having:
a second-conductivity-type layer arranged in the current dispersion layer with a striped pattern shape;
a first electrode electrically connected to the second-conductivity-type layer; and
a second electrode electrically connected to a back surface side of the substrate;

the vertical semiconductor element flows a current between the first electrode and the second electrode;
the guard ring section includes a plurality of linear guard rings having the second conductivity type with a linear frame shape, arranged to extend from a top surface of the current dispersion layer, and surrounding the cell section;
the guard ring section includes a recessed portion provided by a concavity of the current dispersion layer deeper than the cell section, and the cell section protrudes from the guard ring section in a thickness direction of the substrate to provide a mesa portion with an island shape;
the guard ring section further includes an electric field relaxation layer having the first conductivity type or the second conductivity type with a carrier concentration lower than the current dispersion layer and the guard rings, arranged in the current dispersion layer, and extending from a boundary position between the mesa portion and the recessed portion toward an outside of an outer periphery of the mesa portion; and
an upper surface of the electric field relaxation layer is located at a position deeper than a top surface of each guard ring and shallower than a bottom surface of each guard ring.

2. The silicon carbide semiconductor device according to claim 1 , wherein:
the electric field relaxation layer is arranged in an entire area of the guard ring section.

3. The silicon carbide semiconductor device according to claim 1 , wherein:
the cell section includes a vertical semiconductor element having:
a base region having the second conductivity type and arranged on the current dispersion layer;
a source region having the first conductivity type with an impurity concentration higher than the drift layer, and arranged on the base region;
a trench gate structure having a gate insulation film and a gate electrode arranged on the gate insulating film, the gate insulating film being arranged in a gate trench disposed to extend from a top surface of the source region to a position deeper than the base region, and being disposed on an inner wall of the gate trench;
the second-conductivity-type layer arranged in another trench disposed to extend to a position deeper than the gate trench;
a source electrode electrically connected to the source region and the base region to provide the first electrode; and
a drain electrode electrically connected to a back surface side of the substrate to provide the second electrode.

Assignees

• Denso Corp
• Toyota Motor Co Ltd

Inventors

• Takeuchi Yuichi
• Suzuki Ryota
• Nagaoka Tatsuji
• Aoi Sachiko

Classifications

• H10P14/3408

  Silicon carbide · CPC title

• H10D64/513

  within recesses in the substrate, e.g. trench gates, groove gates or buried gates · CPC title

• H10D62/127

  of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs · CPC title

• H10D62/107

  Buried supplementary regions, e.g. buried guard rings  (multi-RESURF H10D62/111) · CPC title

• H10D62/81

  of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation · CPC title