Optimizing performance of recurrent neural networks

Patent metadata

Field	Value
Publication number	US-11769036-B2
Application number	US-201815956674-A
Country	US
Kind code	B2
Filing date	Apr 18, 2018
Priority date	Apr 18, 2018
Publication date	Sep 26, 2023
Grant date	Sep 26, 2023

Abstract

An apparatus for optimizing a computational network is configure to receive an input at a first processing component. The first processing component may include at least a first programmable processing component and a second programmable processing component. The first programmable processing component is configured to compute a first nonlinear function and the second programmable processing component is configured to compute a second nonlinear function which is different than the second nonlinear function. The computational network which may be a recurrent neural network such as a long short-term memory may be operated to generate an inference based at least in part on outputs of the first programmable processing component and the second programmable processing component.

First claim

What is claimed is:

1. A method of a device operating a computational network, comprising:
computing, at a second processing component, one or more linear functions to obtain one or more outputs, the second processing component configured to compute the one or more linear functions, wherein the second processing component is different from a first processing component configured to compute a plurality of nonlinear functions;
generating, at the second processing component, at least one control signal based at least in part on the one or more outputs of the second processing component;
receiving, at the first processing component and from the second processing component, an input and a plurality of control signals including the at least one control signal, the first processing component comprising at least a first programmable processing component and a second programmable processing component, wherein the input corresponds to the one or more outputs of the second processing component, and wherein the at least one control signal includes
an indication of at least a first nonlinear function to be applied to a first portion of the input and a second nonlinear function to be applied to a second portion of the input;
configuring, in accordance with the at least one control signal, the first programmable processing component to compute the first nonlinear function of the first portion of the input and the second programmable processing component to compute the second nonlinear function of the second portion of the input, the first nonlinear function being different than the second nonlinear function, and the first nonlinear function being computed simultaneously with the second nonlinear function; and
operating the computational network to generate an inference based at least in part on simultaneous outputs of the first programmable processing component that computes the first nonlinear function, and the second programmable processing component that computes the second nonlinear function.

2. The method of claim 1 , wherein the first nonlinear function and the second nonlinear function comprise activation functions.

3. The method of claim 2 , wherein at least one of the first nonlinear function and the second nonlinear function is an approximated function.

4. The method of claim 1 , wherein the configuring is based at least in part on the plurality of control signals received by the first processing component.

5. The method of claim 1 , wherein the first processing component includes n programmable processing components, and further comprising configuring each of the n programmable processing components to compute a nonlinear function.

6. The method of claim 1 , wherein the configuring comprises setting at least one switch of at least one of the first programmable processing component and the second programmable processing component, wherein the at least one switch is set such that at least one of the first programmable processing component computes the first nonlinear function and the second programmable processing component computes the second nonlinear function, wherein the at least one switch is set based at least in part on the input and the received plurality of control signals.

7. An apparatus for operating a computational network, comprising:
a memory; and
at least one processor coupled to the memory, the at least one processor being configured to:
compute, at a second processing component, one or more linear functions to obtain one or more outputs, the second processing component configured to compute the one or more linear functions, wherein the second processing component is different from a first processing component configured to compute a plurality of nonlinear functions;
generate, at the second processing component, at least one control signal based at least in part on the one or more outputs of the second processing component;
receive, at the first processing component and from the second processing component, an input and a plurality of control signals including the at least one control signal, the first processing component comprising at least a first programmable processing component and a second programmable processing component, wherein the input corresponds to the one or more outputs of the second processing component, and wherein the at least one control signal includes
an indication of at least a first nonlinear function to be applied to a first portion of the input and a second nonlinear function to be applied to a second portion of the input;
configure, in accordance with the at least one control signal, the first programmable processing component to compute the first nonlinear function of the first portion of the input and the second programmable processing component to compute the second nonlinear function of the second portion of the input, the first nonlinear function being different than the second nonlinear function, and the first nonlinear function being computed simultaneously with the second nonlinear function; and
operate the computational network to generate an inference based at least in part on simultaneous outputs of the first programmable processing component that computes the first nonlinear function, and the second programmable processing component that computes the second nonlinear function.

8. The apparatus of claim 7 , wherein the first nonlinear function and the second nonlinear function comprise activation functions.

9. The apparatus of claim 8 , wherein at least one of the first nonlinear function and the second nonlinear function is an approximated function.

10. The apparatus of claim 7 , wherein the at least one processor is further configured to configure the first programmable processing component to compute the first nonlinear function and the second programmable processing component to compute the second nonlinear function based at least in part on the plurality of control signals received by the first processing component.

11. The apparatus of claim 7 , wherein the first processing component includes n programmable processing components, and wherein the at least one processor is further configured to configure each of the n programmable processing components to compute a nonlinear function.

12. The apparatus of claim 7 , wherein the at least one processor is further configured to set at least one switch of at least one of the first programmable processing component and the second programmable processing component, wherein the at least one switch is set such that at least one of the first programmable processing component computes the first nonlinear function and the second programmable processing component computes the second nonlinear function, wherein the at least one switch is set based at least in part on the input and the received plurality of control signals.

13. An apparatus for operating a computational network, comprising:
circuitry configured for:
computing, at a second processing component, one or more linear functions to obtain one or more outputs, the second processing component configured to compute the one or more linear functions, wherein the second processing component is different from a first processing component configured to compute a plurality of nonlinear functions;
generating, at the second processing component, at least one control signal based at least in part on the one or more outputs of the second processing component;
receiving, at the first processing component and from the second processing component, an input and a plurality of control signals including the at least one control signal, the first processing component comprising at least a first programmable processing compon

Assignees

• Qualcomm Inc

Inventors

• Cammarota Rosario
• Goldfarb Michael
• Rastogi Manu
• Ozarde Sarang

Classifications

• G06N3/08

  Learning methods · CPC title

• G06N3/0442 Primary

  characterised by memory or gating, e.g. long short-term memory [LSTM] or gated recurrent units [GRU] · CPC title

• G06N3/0464

  Convolutional networks [CNN, ConvNet] · CPC title

• G06N3/04 Primary

  Architecture, e.g. interconnection topology · CPC title

• G06N5/04

  Inference or reasoning models · CPC title