Display substrate, display panel and display device

Patent metadata

Field	Value
Publication number	US-11768412-B2
Application number	US-202017299678-A
Country	US
Kind code	B2
Filing date	Sep 17, 2020
Priority date	Sep 17, 2020
Publication date	Sep 26, 2023
Grant date	Sep 26, 2023

Abstract

There is provided a display substrate, including gate lines and data lines, which define pixel units, each pixel unit includes a pixel electrode, at least some pixel units are provided with a conductive bridge line in a same layer as the pixel electrode; in the pixel unit with the conductive bridge line, a first hollow structure is on a first side of a first or second end part of the pixel electrode, an end of the conductive bridge line is in the first hollow structure, a second hollow structure is on a second side of the first end part, an absolute value of a difference between parasitic capacitances respectively formed between the pixel electrode and the data lines on two sides of the pixel electrode and closest thereto is less than or equal to a preset capacitance difference value. A display panel and a display device are further provided.

First claim

The invention claimed is:

1. A display substrate, comprising: a first base substrate, and a plurality of gate lines and a plurality of data lines which are positioned on the first base substrate, wherein the gate lines extend along a first direction, the data lines extend along a second direction, and the first direction and the second direction are crossed and are parallel to a plane where the first base substrate is positioned;
the plurality of gate lines and the plurality of data lines define a plurality of pixel units, and each of the pixel units comprises a thin film transistor, a pixel electrode and a common electrode, the pixel electrode is positioned on a side of the common electrode away from the first base substrate, an area where the pixel electrode is positioned and an area where the thin film transistor is positioned in a same one of the pixel units are arranged along the second direction, an end, proximal to the thin film transistor, of the pixel electrode is a first end part, an end, away from the thin film transistor, of the pixel electrode is a second end part, at least a portion of the pixel units are provided with a conductive bridge line, and the conductive bridge line and the pixel electrode are arranged in a same layer;
in the pixel unit configured with the conductive bridge line, the pixel electrode has a first notch on a first side of the first end part or the second end part of the pixel electrode, an end of the conductive bridge line is located in the first notch and is coupled to the common electrode through a via hole, and the pixel electrode has a second notch on a second side of at least one of the first end part or the second end part of the pixel electrode, so that lengths of a first portion and a second portion of the pixel electrode, that generate lateral capacitances respectively with the data lines located on two sides of the pixel electrode and closest to the pixel electrode, in the second direction, are substantially equal to each other, and an absolute value of a difference between the lateral capacitances respectively formed between the pixel electrode and the data lines which are located on the two sides of the pixel electrode and are closest to the pixel electrode is less than or equal to a preset capacitance difference value;
the first side and the second side are opposite sides of the pixel electrode in the first direction.

2. The display substrate according to claim 1 , wherein the second notch and the first notch have a same length in the second direction.

3. The display substrate according to claim 1 , wherein the second notch comprises a first sub-notch at the second side of the first end part of the pixel electrode and a second sub-notch at the second side of the second end part of the pixel electrode, and the first sub notch and the second sub notch are configured such that the lengths of the first portion and the second portion of the pixel electrode, that generate the lateral capacitances respectively with the data lines located on the two sides of the pixel electrode and closest to the pixel electrode, in the second direction, are substantially equal to each other, and the absolute value of the difference between the lateral capacitances respectively formed between the pixel electrode and the data lines located at the two sides of the pixel electrode and closest to the pixel electrode is less than or equal to the preset capacitance difference value.

4. The display substrate according to claim 3 , wherein a sum of lengths of the first sub notch and the second sub notch in the second direction is equal to a length of the first notch in the second direction.

5. The display substrate according to claim 3 , wherein a length of each of the first sub-notch and the second sub-notch in the first direction is less than or equal to a length of the first notch in the first direction.

6. The display substrate according to claim 1 , wherein a length of the second notch in the first direction is less than or equal to a length of the first notch in the first direction.

7. The display substrate according to claim 1 , wherein the lateral capacitances respectively formed between the pixel electrode and the data lines located at the two sides of the pixel electrode and closest to the pixel electrode are equal to each other.

8. The display substrate according to claim 1 , wherein, in the pixel unit configured with the conductive bridge line, the pixel electrode has a first orthographic projection on the first base substrate, the data lines located at two sides of the pixel electrode and closest to the pixel electrode has a second orthographic projection on the first base substrate, and a spacing area is formed between the first orthographic projection and the second orthographic projection;
in the pixel unit configured with the conductive bridge line, the common electrode is a block-shaped common electrode, and an orthographic projection of an edge of the block-shaped common electrode proximal to the data line on the first base substrate is located in the spacing area.

9. The display substrate according to claim 1 , further comprising common electrode lines which are arranged in the same layer as the gate lines;
the pixel units arranged along the first direction correspond to a same one of the common electrode lines, the common electrode in each of the pixel units is electrically coupled to a corresponding one of the common electrode lines, and an orthographic projection of the second end part of the pixel electrode in each of the pixel units on the first base substrate is overlapped with an orthographic projection of the corresponding one of the common electrode lines on the first base substrate.

10. The display substrate according to claim 1 , wherein a drain of the thin film transistor is coupled to the pixel electrode through a via hole;
in response to that the first notch is located on the first side of the first end part of the pixel electrode, the via hole for coupling the drain of the thin film transistor with the pixel electrode is located between the first notch and the second hollow notch.

11. A display panel, comprising: a display substrate and a opposite substrate which are oppositely arranged, wherein a liquid crystal layer is filled between the display substrate and the opposite substrate, and the display substrate is that according to claim 1 .

12. A display device, comprising the display panel according to claim 11 and a light source.

Assignees

• Hefei Boe Display Tech Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Zhang Chunxu
• Dai Ke
• Yang Haipeng
• Zhang Yuntian
• Jiang Xiaoting
• Cheng Min

Classifications

• G02F1/136286 Primary

  Wiring, e.g. gate line, drain line · CPC title

• G02F1/1368

  in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title

• G02F1/13606 Primary

  having means for reducing parasitic capacitance · CPC title