Photonics fabrication process performance improvement

Patent metadata

Field	Value
Publication number	US-11762146-B2
Application number	US-202217719808-A
Country	US
Kind code	B2
Filing date	Apr 13, 2022
Priority date	Apr 17, 2018
Publication date	Sep 19, 2023
Grant date	Sep 19, 2023

Abstract

A plurality of waveguide structures are formed in at least one silicon layer of a first member. The first member includes: a first surface of a first silicon dioxide layer that is attached to a second member that consists essentially of an optically transmissive material having a thermal conductivity less than about 50 W/(m·K), and a second surface of material that was deposited over at least some of the plurality of waveguide structures. An array of phase shifters is formed in one or more layers of the first member. An array of temperature controlling elements are in proximity to the array of phase shifters.

First claim

What is claimed is:

1. A method for fabricating a photonic integrated circuit, comprising:
forming one or more waveguide structures in a first silicon layer of a silicon-on-insulator (SOI) wafer, the SOI wafer including:
the first silicon layer including the one or more waveguide structures; and
a buried silicon dioxide layer that is between the first silicon layer and a second silicon layer at least 100 microns thick;

depositing material over at least some of the waveguide structures;
bonding a member at least 100 microns thick and consisting essentially of an optically transmissive material having a thermal conductivity less than about 50 W/(m·K) to a surface of the deposited material to form a transmissive pathway for emission of a beam from the first silicon layer to an aperture on the photonic integrated circuit; and
removing most or all of the second silicon layer.

2. The method of claim 1 , wherein the material that was deposited over at least some of the waveguide structures consists essentially of silicon dioxide.

3. The method of claim 1 , wherein the member comprises one or more of silicon dioxide, plastic, quartz, or sapphire.

4. The method of claim 1 , wherein the bonding comprises direct bonding without any intermediate layer of material between a surface of the member and the surface of the deposited material.

5. The method of claim 1 , wherein removing most or all of the second silicon layer comprises removing all of the second silicon layer.

6. The method of claim 1 , wherein the transmissive pathway does not include obstructive material within a distance of twice a beam radius from a propagation axis of the beam.

7. The method of claim 6 , wherein most of the transmissive pathway is through the member.

8. The method of claim 1 , wherein the transmissive pathway is formed through the surface of the deposited material to which the member is bonded.

9. The method of claim 1 , wherein the optically transmissive material has an index of refraction that is substantially equal to an index of refraction of the deposited material.

10. The method of claim 9 , wherein the transmissive pathway is formed only through materials having an index of refraction substantially equal to the index of refraction of the deposited material.

11. The method of claim 1 , further comprising removing one or more portions of the buried silicon dioxide layer.

12. The method of claim 11 , further comprising doping one or more portions of the first silicon layer.

13. The method of claim 12 , wherein the doping results in the first silicon layer comprising one or more active photonic portions.

14. The method of claim 11 , further comprising adding one or more layers of germanium in the one or more removed portions.

15. The method of claim 14 , wherein the added one or more layers of germanium act as a photodetector.

16. The method of claim 11 , wherein the removing one or more portions of the buried silicon dioxide layer comprises drilling one or more holes in the buried silicon dioxide layer.

17. The method of claim 11 , further comprising adding conductive material in the one or more removed portions.

18. The method of claim 17 , wherein the conductive material forms one or more electrical vias that connect to at least one of (1) one or more metal layers or (2) an active photonic device.

19. A photonic integrated circuit fabricated using a method comprising:
forming one or more waveguide structures in a first silicon layer of a silicon-on-insulator (SOI) wafer, the SOI wafer including:
the first silicon layer including the one or more waveguide structures; and
a buried silicon dioxide layer that is between the first silicon layer and a second silicon layer at least 100 microns thick;

depositing material over at least some of the waveguide structures;
bonding a member at least 100 microns thick and consisting essentially of an optically transmissive material having a thermal conductivity less than about 50 W/(m·K) to a surface of the deposited material to form a transmissive pathway for emission of a beam from the first silicon layer to an aperture on the photonic integrated circuit; and
removing most or all of the second silicon layer.

20. The photonic integrated circuit of claim 19 , wherein the transmissive pathway does not include obstructive material within a distance of twice a beam radius from a propagation axis of the beam.

21. A method for fabricating a photonic integrated circuit, comprising:
forming one or more waveguide structures in a first silicon layer of a silicon-on-insulator (SOI) wafer, the SOI wafer including:
the first silicon layer including the one or more waveguide structures; and
a buried silicon dioxide layer that is between the first silicon layer and a second silicon layer at least 100 microns thick;

depositing material over at least some of the waveguide structures;
bonding a member consisting essentially of an optically transmissive material having a thermal conductivity less than about 50 W/(m·K) to a surface of the deposited material to form a transmissive pathway for emission of a beam from the first silicon layer to an aperture on the photonic integrated circuit, wherein most of the transmissive pathway is through the member; and
removing most or all of the second silicon layer.

22. The method of claim 21 , wherein the bonding comprises direct bonding without any intermediate layer of material between a surface of the member and the surface of the deposited material.

23. The method of claim 21 , wherein removing most or all of the second silicon layer comprises removing all of the second silicon layer.

24. The method of claim 21 , wherein the transmissive pathway does not include obstructive material within a distance of twice a beam radius from a propagation axis of the beam.

25. The method of claim 21 , wherein the transmissive pathway is formed through the surface of the deposited material to which the member is bonded.

26. The method of claim 21 , wherein the optically transmissive material has an index of refraction that is substantially equal to an index of refraction of the deposited material.

27. The method of claim 26 , wherein the transmissive pathway is formed only through materials having an index of refraction substantially equal to the index of refraction of the deposited material.

28. A photonic integrated circuit fabricated using a method comprising:
forming one or more waveguide structures in a first silicon layer of a silicon-on-insulator (SOI) wafer, the SOI wafer including:
the first silicon layer including the one or more waveguide structures; and
a buried silicon dioxide layer that is between the first silicon layer and a second silicon layer at least 100 microns thick;

depositing material over at least some of the waveguide structures;
bonding a member consisting essentially of an optically transmissive material having a thermal conductivity less than about 50 W/(m·K) to a surface of the deposited material to form a transmissive pathway for emission of a beam from the first silicon layer to an aperture on the photonic integrated circuit, wherein most of the transmissive pathway is through the member; and
removing most or all of the second silicon layer.

29. A method for fabricating a photonic integrated circuit, comprising:
forming one or more waveguide structures i

Assignees

• Analog Photonics LLC

Inventors

• Watts Michael Robert
• Moss Benjamin Roy
• Hosseini Ehsan Shah
• Poulton Christopher Vincent
• Russo Peter Nicholas

Classifications

• H10W90/722

  between stacked chips · CPC title

• H10W74/114

  by a substrate and the encapsulations · CPC title

• H10W74/01

  Manufacture or treatment · CPC title

• H10W72/252

  comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu · CPC title

• H10W72/072

  of bump connectors · CPC title