Display apparatus and method of manufacturing the same

US11758775B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11758775-B2
Application numberUS-202217844808-A
CountryUS
Kind codeB2
Filing dateJun 21, 2022
Priority dateMar 29, 2019
Publication dateSep 12, 2023
Grant dateSep 12, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display apparatus includes: a substrate including a component area, a display area, and a middle area provided between the component area and the display area; a thin-film transistor arranged in the display area; a display element including a pixel electrode, an intermediate layer, and an opposite electrode, wherein the pixel electrode is electrically connected to the thin-film transistor; a first organic insulating layer, a second organic insulating layer, and a passivation layer sequentially stacked on each other between the thin-film transistor and the pixel electrode; and a groove arranged in the middle area, wherein the groove divides an organic material layer included in the intermediate layer, wherein the groove is provided in multiple layers including an organic layer and an inorganic layer, wherein the organic layer is arranged on the substrate, and the inorganic layer is stacked on the organic layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of manufacturing a display apparatus, the method comprising: preparing a substrate comprising a component area, a display area, and a middle area provided between the component area and the display area; forming a thin-film transistor in the display area; sequentially stacking a first organic insulating layer, a second organic insulating layer, and a passivation layer on the thin-film transistor; forming a display element on the passivation layer, wherein the display element comprises a pixel electrode, an intermediate layer, and an opposite electrode, wherein the pixel electrode is electrically connected to the thin-film transistor, and wherein the intermediate layer is disposed on the pixel electrode; and forming a groove in the middle area, wherein the groove divides an organic material layer included in the intermediate layer, wherein the forming of the groove comprises: stacking an organic layer on the substrate and patterning an empty space in the organic layer, and stacking an inorganic layer on the organic layer and patterning an empty space in the inorganic layer, wherein the forming of the groove comprises removing a part of an inner wall of the organic layer, which forms the patterned empty space of the organic layer, by performing dry etching, wherein, by removing the part of the inner wall of the organic layer, a portion of the inorganic layer extending beyond an edge portion of the organic layer to vertically overlap the patterned empty space of the organic layer is formed. 2. The method of claim 1 , wherein the performing of the dry etching to remove the part of the inner wall of the organic layer uses oxygen plasma. 3. The method of claim 1 , wherein the organic layer comprises a first sub-lower layer and a second sub-lower layer, wherein the first sub-lower layer is a same layer as the second organic insulating layer and the second sub-lower layer is a same layer as the first organic insulating layer. 4. The method of claim 3 , wherein an end of the second sub-lower layer adjacent to the groove is covered by the first sub-lower layer. 5. The method of claim 1 , wherein the inorganic layer is a same layer as the passivation layer. 6. The method of claim 1 , wherein further comprising forming a thin-film encapsulation layer covering the display area and the middle area on the substrate. 7. The method of claim 6 , wherein the thin-film encapsulation layer comprises a first inorganic encapsulation layer, a second inorganic encapsulation layer, and an organic encapsulation layer arranged between the first inorganic encapsulation layer and the second inorganic encapsulation layer. 8. The method of claim 7 , wherein the first inorganic encapsulation layer covers an inner wall of the groove that partitions the organic layer and the inorganic layer, wherein the organic encapsulation layer fills an inner space of the groove, and wherein the second inorganic encapsulation layer covers an upper surface of the organic encapsulation layer. 9. The method of claim 1 , wherein the intermediate layer comprises a light-emitting layer, a hole transport layer, and an electron transport layer, wherein the light-emitting layer is disposed between the hole transport layer and the electron transport layer, and wherein the hole transport layer and the electron transport layer are extended and stacked on the inorganic layer. 10. The method of claim 9 , wherein at least one of the hole transport layer or the electron transport layer is divided by the groove. 11. The method of claim 1 , wherein the inorganic layer does not extend into the groove.

Assignees

Inventors

Classifications

  • multilayered coatings having a repetitive structure, e.g. having multiple organic-inorganic bilayers · CPC title

  • Manufacture or treatment specially adapted for the organic devices covered by this subclass · CPC title

  • Manufacture or treatment · CPC title

  • H10K59/124Primary

    Insulating layers formed between TFT elements and OLED elements · CPC title

  • of OLED structures · CPC title

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What does patent US11758775B2 cover?
A display apparatus includes: a substrate including a component area, a display area, and a middle area provided between the component area and the display area; a thin-film transistor arranged in the display area; a display element including a pixel electrode, an intermediate layer, and an opposite electrode, wherein the pixel electrode is electrically connected to the thin-film transistor; a …
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10K59/8731. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 12 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).