Display device having crack prevention pattern

Patent metadata

Field	Value
Publication number	US-11758773-B2
Application number	US-202117319263-A
Country	US
Kind code	B2
Filing date	May 13, 2021
Priority date	Oct 8, 2020
Publication date	Sep 12, 2023
Grant date	Sep 12, 2023

Abstract

A display device includes a substrate including a first pixel area, a second pixel area spaced apart from the first pixel area, and a valley area between the first pixel area and the second pixel area, a first insulating layer on the substrate and in both the first pixel area and the second pixel area, a penetration hole through the first insulating layer and corresponding to the valley area, the penetration hole exposing a side surface of the first insulating layer and an upper surface of the substrate to outside the first insulating layer, a crack prevention pattern which is in the penetration hole and covers the side surface of the first insulating layer, and a second insulating layer facing the first insulating layer with the crack prevention pattern therebetween, the second insulating layer in contact with the upper surface of the substrate at the penetration hole.

First claim

What is claimed is:

1. A display device comprising:
a substrate including a first pixel area, a second pixel area spaced apart from the first pixel area, and a valley area between the first pixel area and the second pixel area;
a first insulating layer on the substrate and in both the first pixel area and the second pixel area;
a penetration hole through the first insulating layer and corresponding to the valley area, the penetration hole exposing a side surface of the first insulating layer and an upper surface of the substrate to outside the first insulating layer;
a crack prevention pattern which is in the penetration hole and covers the side surface of the first insulating layer, the crack prevention pattern which covers the side surface of the first insulating layer being electrically floating; and
a second insulating layer facing the first insulating layer with the crack prevention pattern therebetween, the second insulating layer in contact with the upper surface of the substrate at the penetration hole.

2. The display device of claim 1 , wherein
each of the crack prevention pattern and the first insulating layer has a modulus, and
the modulus of the crack prevention pattern is greater than the modulus of the first insulating layer.

3. The display device of claim 1 , wherein the crack prevention pattern includes a metal.

4. The display device of claim 3 , wherein the crack prevention pattern includes molybdenum.

5. The display device of claim 1 , wherein at the penetration hole:
the first insulating layer includes an upper surface which extends from the side surface and is closest to the second insulating layer, and
the crack prevention pattern is extended outside the penetration hole and along the upper surface of the first insulating layer to be between the first insulating layer and the second insulating layer.

6. The display device of claim 1 , wherein
the first insulating layer includes a first inorganic insulating layer, a second inorganic insulating layer and a third inorganic insulating layer in order toward the second insulating layer,
further comprising in the first pixel area:
a transistor and a display element which is connected to the transistor;
an active pattern of the transistor which is between the substrate and the first inorganic insulating layer;
a plurality of gate electrodes of the transistor which is between the first inorganic insulating layer and the second inorganic insulating layer and corresponding to the active pattern; and
a connection electrode which connects the transistor to the display element and is between the third inorganic insulating layer and the second insulating layer, and
wherein the crack prevention pattern and the connection electrode are respective patterns of a same material layer on the substrate.

7. The display device of claim 6 , further comprising a connection pattern which connects the first pixel area to the second pixel area,
wherein the connection pattern faces the first insulating layer with the second insulating layer therebetween, extends across the valley area, and is electrically connected to the first pixel area at any one of the plurality of gate electrodes thereof.

8. The display device of claim 1 , wherein the substrate comprises in order toward the first insulating layer, an organic layer, a barrier layer and a buffer layer,
wherein the penetration hole extends into the buffer layer of the substrate.

9. A display device comprising:
a substrate including a plurality of pixel areas arranged in a matrix form and a valley area which surrounds each of the pixel areas;
a first insulating layer on the substrate and in each of the pixel areas;
a penetration hole through the first insulating layer and corresponding to the valley area, the penetration hole exposing a side surface of the first insulating layer and an upper surface of the substrate to outside the first insulating layer;
a crack prevention pattern which is in the penetration hole and covers the side surface of the first insulating layer; and
a second insulating layer facing the first insulating layer with the crack prevention pattern therebetween, the second insulating layer contacting the upper surface of the substrate at the penetration hole.

10. The display device of claim 9 , wherein
each of the crack prevention pattern and the first insulating layer has a modulus, and
the modulus of the crack prevention pattern is greater than the modulus of the first insulating layer.

11. The display device of claim 9 , wherein the crack prevention pattern includes a metal.

12. The display device of claim 11 , wherein the crack prevention pattern includes molybdenum.

13. The display device of claim 11 , wherein the crack prevention pattern is electrically floating.

14. The display device of claim 9 , wherein at the penetration hole:
the first insulating layer includes an upper surface which extends from the side surface and is closest to the second insulating layer, and
the crack prevention pattern is extended outside the penetration hole and along the upper surface of the first insulating layer to be between the first insulating layer and the second insulating layer.

15. The display device of claim 9 , wherein
the first insulating layer includes in order toward the second insulating layer, a first inorganic insulating layer, a second inorganic insulating layer and a third inorganic insulating layer,
further comprising in a pixel area of the pixel areas:
a transistor and a display element which is connected to the transistor;
an active pattern of the transistor which is between the substrate and the first inorganic insulating layer;
a plurality of gate electrodes of the transistor which is between the first inorganic insulating layer and the second inorganic insulating layer and corresponding to the active pattern; and
a connection electrode which connects the transistor to the display element and is between the third inorganic insulating layer and the second insulating layer, and
wherein the crack prevention pattern and the connection electrode are respective patterns of a same material layer on the substrate.

16. The display device of claim 15 , further comprising a connection pattern which electrically connects the pixel areas adjacent to each other,
wherein the connection pattern faces the first insulating layer with the second insulating layer therebetween, extends across the valley area, and is electrically connected to the pixel area at any one of the plurality of gate electrodes thereof.

17. The display device of claim 9 , wherein the substrate comprises in order toward the first insulating layer, an organic layer, a barrier layer and a buffer layer,
wherein the penetration hole extends into the buffer layer of the substrate.

Assignees

• Samsung Display Co Ltd

Inventors

• Lee Jin-Yong
• Ju Jinho
• Park Kwangwoo
• Ann Minjung

Classifications

• H10D86/451 Primary

  characterised by the compositions or shapes of the interlayer dielectrics · CPC title

• H10K59/873

  Encapsulations · CPC title

• H10K59/124 Primary

  Insulating layers formed between TFT elements and OLED elements · CPC title

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D86/0212

  comprising manufacture, treatment or coating of substrates · CPC title