SiC composite substrate and method for manufacturing same
US-10711373-B2 · Jul 14, 2020 · US
US11757003B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11757003-B2 |
| Application number | US-202117368845-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 7, 2021 |
| Priority date | Jul 24, 2020 |
| Publication date | Sep 12, 2023 |
| Grant date | Sep 12, 2023 |
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A bonding wafer structure includes a support substrate, a bonding layer, and a silicon carbide (SiC) layer. The bonding layer is formed on a surface of the support substrate, and the SiC layer is bonded onto the bonding layer, in which a carbon surface of the SiC layer is in direct contact with the bonding layer. The SiC layer has a basal plane dislocation (BPD) of 1,000 ea/cm 2 to 20,000 ea/cm 2 , a total thickness variation (TTV) greater than that of the support substrate, and a diameter equal to or less than that of the support substrate. The bonding wafer structure has a TTV of less than 10 μm, a bow of less than 30 μm, and a warp of less than 60 μm.
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What is claimed is: 1. A bonding wafer structure, comprising: a support substrate; a bonding layer, formed on a surface of the support substrate; and a silicon carbide layer, bonded onto the bonding layer, wherein a carbon surface of the silicon carbide layer is in direct contact with the bonding layer, the silicon carbide layer has a basal plane dislocation (BPD) of 1,000 ea/cm 2 to 20,000 ea/cm 2 , the silicon carbide layer has a total thickness variation (TTV) greater than a TTV of the support substrate, and the silicon carbide layer has a diameter equal to or less than a diameter of the support substrate, and the bonding wafer structure has a TTV of less than 10 μm, a bow of less than 30 μm, and a warp of less than 60 μm. 2. The bonding wafer structure according to claim 1 , wherein the silicon carbide layer has a thickness of less than 500 μm, and the bonding wafer structure has a thickness of less than 2,000 μm. 3. The bonding wafer structure according to claim 1 , wherein the bonding layer has a softening point of 50° C. to 200° C., a thickness of less than 100 μm, and uniformity of less than 10%. 4. The bonding wafer structure according to claim 1 , wherein the support substrate has a TTV of less than 3 μm, a bow of less than 20 μm, a warp of less than 40 μm, and a Young's modulus of greater than 160 GPa. 5. The bonding wafer structure according to claim 1 , wherein the support substrate comprises a single-layer or multi-layer structure, and the bonding layer comprises a single-layer or multi-layer structure. 6. The bonding wafer structure according to claim 1 , wherein a concentricity of the silicon carbide layer and the support substrate is less than 1 mm. 7. The bonding wafer structure according to claim 1 , further comprising an epitaxy silicon carbide substrate bonded to a silicon surface of the silicon carbide layer, the epitaxy silicon carbide substrate has a BPD less than the BPD of the silicon carbide layer, and the epitaxy silicon carbide substrate has a stress less than a stress of the silicon carbide layer. 8. The bonding wafer structure according to claim 7 , further comprising an ion implantation region formed within the epitaxy silicon carbide substrate, wherein the ion implantation region is at a distance of within 1 μm from a bonding surface between the epitaxy silicon carbide substrate and the silicon carbide layer. 9. A method of manufacturing a bonding wafer structure, comprising: performing coating and forming a bonding layer on a surface of a support substrate; bonding a carbon surface of a silicon carbide layer onto the bonding layer, wherein the silicon carbide layer has a total thickness variation (TTV) greater than a TTV of the support substrate, the silicon carbide layer has a diameter equal to or less than a diameter of the support substrate, the silicon carbide layer has a basal plane dislocation (BPD) of 1,000 ea/cm 2 to 20,000 ea/cm 2 , and the silicon carbide layer has a bow of greater than 75 μm and a warp of greater than 150 μm before bonding; grinding a silicon surface of the silicon carbide layer to reduce a thickness of the silicon carbide layer; and polishing the silicon surface of the silicon carbide layer after grinding to obtain a bonding wafer structure, wherein the bonding wafer structure has a TTV of less than 10 μm, a bow of less than 30 μm, and a warp of less than 60 μm. 10. The method of manufacturing the bonding wafer structure according to claim 9 , wherein bonding the carbon surface of the silicon carbide layer onto the bonding layer comprises aligning a flat of the support substrate with a flat of the silicon carbide layer. 11. The method of manufacturing the bonding wafer structure according to claim 9 , wherein a load of bonding the carbon surface of the silicon carbide layer onto the bonding layer is 8 kgf to 10 kgf. 12. The method of manufacturing the bonding wafer structure according to claim 9 , further comprising, after bonding the carbon surface of the silicon carbide layer onto the bonding layer, removing residual material of the bonding layer and cleaning the support substrate. 13. The method of manufacturing the bonding wafer structure according to claim 9 , wherein a thickness of the silicon carbide layer reduced by the grinding is 5 μm to 12 μm. 14. The method of manufacturing the bonding wafer structure according to claim 9 , wherein the silicon carbide layer before the bonding and the bonding wafer structure after the polishing have a change (Δbow) in bow of greater than 80 μm, and a change (Δwarp) in warp of greater than 160 μm. 15. The method of manufacturing the bonding wafer structure according to claim 9 , wherein performing coating and forming the bonding layer comprises spin-coating wax on the surface of the support substrate at a temperature of 110° C. to 130° C. 16. The method of manufacturing the bonding wafer structure according to claim 9 , further comprising, before grinding the silicon surface of the silicon carbide layer: measuring the TTV of the support substrate, the bonding layer and the silicon carbide layer that are bonded together; and performing a subsequent step in response to the measured TTV being less than 10 μm, and otherwise, removing the bonding layer and the silicon carbide layer and then again performing coating and forming a bonding layer on the surface of the support substrate in response to the measured TTV being equal to or greater than 10 μm. 17. The method of manufacturing the bonding wafer structure according to claim 9 , wherein the polishing comprises rough polishing and fine polishing.
Preparing bulk and homogeneous wafers · CPC title
Grinding, lapping or polishing of wafers, substrates or parts of devices · CPC title
Silicon carbide · CPC title
with separation or delamination along an ion implanted layer, e.g. Smart-cut · CPC title
Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers · CPC title
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