Virtual computational storage devices

US11755251B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11755251-B2
Application numberUS-202117351114-A
CountryUS
Kind codeB2
Filing dateJun 17, 2021
Priority dateJun 2, 2021
Publication dateSep 12, 2023
Grant dateSep 12, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A system includes a virtual computational storage emulation module configured to provide a virtual computational storage device. The system further includes a storage element, where the virtual computational storage emulation module is configured to store data associated with the virtual computational storage device at the storage element. The system further includes a compute element. The virtual computational storage emulation module is configured to send a compute request associated with the virtual computational storage device to the compute element.

First claim

Opening claim text (preview).

What is claimed is: 1. A system comprising: a processor configured to execute a virtual computational storage emulation module for providing a virtual computational storage device; a storage element, wherein the virtual computational storage emulation module is configured to store data associated with the virtual computational storage device at the storage element; and a compute element, wherein the processor is further configured to execute the virtual computational storage emulation module to: receive a first compute request associated with the virtual computational storage device, the first compute request adhering to a first protocol; translate the first compute request to a second compute request, the second compute request adhering to a second protocol; and send the second compute request to the compute element for generating an output responsive to the second compute request. 2. The system of claim 1 , wherein the storage element comprises a solid state drive, and wherein the storage element and the compute element correspond to components of a computational storage device. 3. The system of claim 1 , wherein the storage element and the compute element correspond to components of a server device. 4. The system of claim 1 , wherein the storage element corresponds to a component of a storage device, and wherein the compute element corresponds to a component of a device distinct from the storage device. 5. The system of claim 1 , wherein the processor is further configured to execute the virtual computational storage emulation module to advertise availability of the virtual computational storage device. 6. The system of claim 1 , wherein the system further includes a second storage element, wherein the processor is further configured to execute the virtual computational storage emulation module to store second data associated with the virtual computational storage device at the second storage element. 7. The system of claim 6 , wherein a first address range of the virtual computational storage device is associated with the storage element, wherein a second address range of the virtual computational storage device is associated with the second storage element, and wherein the processor is further configured to execute the virtual computational storage emulation module to: store the data at the storage element in response to a first request to store the data indicating the first address range; and store the second data at the second storage element in response to a second request to store the second data indicating the second address range. 8. The system of claim 6 , wherein the processor is further configured to execute the virtual computational storage emulation module to select the second storage element to store the second data based on a load balancing algorithm. 9. The system of claim 1 , wherein the system further includes a second compute element, wherein the processor is further configured to execute the virtual computational storage emulation module to send a second compute request associated with the virtual computational storage device to the second compute element. 10. The system of claim 9 , wherein the processor is further configured to execute the virtual computational storage emulation module to select the second compute element for the second compute request based on an address of data associated with the second compute request. 11. The system of claim 9 , wherein the processor is further configured to execute the virtual computational storage emulation module to select the second compute element for the second compute request based on a load balancing algorithm. 12. The system of claim 1 , wherein the processor is further configured to execute the virtual computational storage emulation module to provide a second virtual computational storage device. 13. The system of claim 12 , wherein the processor is further configured to execute the virtual computational storage emulation module to store second data associated with the second virtual computational storage device at the storage element. 14. The system of claim 12 , wherein the processor is further configured to execute the virtual computational storage emulation module to send a second compute request associated with the second virtual computational storage device to the compute element. 15. A method comprising: providing, at a virtual computational storage device emulation module, a virtual computational storage device, wherein data associated with the virtual computational storage device is stored at a storage element; receiving, at the virtual computational storage device emulation module, a compute request for the virtual computational storage device; and sending a translation of the compute request to a compute element, wherein sending the translation of the compute request includes translating the compute request from a first protocol to a second protocol. 16. The method of claim 15 , wherein sending the translation of the compute request includes translating an address of the virtual computational storage device identified by the compute request to a translated address of the storage element. 17. The method of claim 15 , further comprising: receiving a storage request identifying a first address of the virtual computational storage device; and sending a translated storage request to the storage element, the translated storage request identifying a translated address of the storage element. 18. A system comprising: a compute element of a first device; a storage element of a second device; a computational storage client; and a processor configured to: receive a compute request from the computational storage client; send a translation of the compute request to the compute element of the first device, wherein in sending the translation of the compute request, the processor is configured to translate the compute request from a first protocol to a second protocol; receive a storage request from the computational storage client; and send a translation of the storage request to the storage element of the second device. 19. The system of claim 18 , wherein the compute element corresponds to a field programmable gate array (FPGA).

Assignees

Inventors

Classifications

  • G06F3/0664Primary

    at device level, e.g. emulation of a storage device or system · CPC title

  • Hypervisors; Virtual machine monitors · CPC title

  • Runtime interpretation or emulation, e g. emulator loops, bytecode interpretation · CPC title

  • Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

  • I/O management, e.g. providing access to device drivers or storage · CPC title

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What does patent US11755251B2 cover?
A system includes a virtual computational storage emulation module configured to provide a virtual computational storage device. The system further includes a storage element, where the virtual computational storage emulation module is configured to store data associated with the virtual computational storage device at the storage element. The system further includes a compute element. The virt…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06F3/0664. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Sep 12 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 11 related publications on this page (citations in our corpus or others sharing the same primary CPC).