Shock recovery for silicon microphone systems

US11750960B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11750960-B2
Application numberUS-202117451562-A
CountryUS
Kind codeB2
Filing dateOct 20, 2021
Priority dateOct 20, 2021
Publication dateSep 5, 2023
Grant dateSep 5, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

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A microphone includes an amplifier coupled to an input node of the microphone; a shock detector coupled to the input node of the microphone; and a recovery circuit having an input coupled to an output of the shock detector, and an output coupled to the input of the microphone.

First claim

Opening claim text (preview).

What is claimed is: 1. A microphone comprising: an amplifier coupled to an input node of the microphone; a shock detector coupled to the input node of the microphone; and a recovery circuit having an input coupled to an output of the shock detector, and an output coupled to the input node of the microphone, wherein the recovery circuit comprises a digital-to-analog converter (DAC); and a switch having a control node coupled to an output of the DAC. 2. The microphone of claim 1 , wherein the shock detector comprises a plurality of comparators. 3. The microphone of claim 1 , wherein the recovery circuit further comprises a counter and a state machine. 4. The microphone of claim 1 , wherein a controlled node of the switch is configured for supplying a plurality of impedance steps to the input node of the microphone. 5. The microphone of claim 1 , wherein a plurality of voltage steps at the control node of the switch is configured to have a range between a shocked bias level and a normal bias level. 6. The microphone of claim 1 , further comprising an additional switch coupled to the input node of the microphone, wherein the additional switch is configured for implementing a startup mode of operation. 7. A circuit comprising: a shock detector coupled to an input node; and a recovery circuit coupled to an output of the shock detector, wherein the recovery circuit, in response to a shock detected by the shock detector, is configured for lowering an impedance of the input node after the shock, and then gradually increasing the impedance of the input node. 8. The circuit of claim 7 , wherein the shock detector comprises a first comparator having a first threshold voltage, and a second comparator having a second threshold voltage. 9. The circuit of claim 7 , wherein the recovery circuit comprises: a digital-to-analog converter (DAC) coupled to an output of the recovery circuit; and a switch having a control node coupled to an output of the DAC, and a controlled node coupled to an output of the recovery circuit. 10. The circuit of claim 9 , wherein the recovery circuit further comprises a counter and a state machine. 11. The circuit of claim 9 , wherein the controlled node of the switch is configured for supplying a plurality of sequentially increased impedance steps to the input node. 12. The circuit of claim 11 , wherein the sequentially increased impedance steps are configured to have a range between a shocked bias level and a normal bias level. 13. The circuit of claim 9 , wherein the switch is coupled between the input node and a bias voltage source. 14. A method of operating a microphone, the method comprising: detecting a shock condition at an input of the microphone; reducing an impedance of a bias circuit coupled to the input of the microphone upon detection of the shock condition; and gradually increasing the impedance of the bias circuit. 15. The method of claim 14 , wherein the impedance of the bias circuit is gradually increased after the shock condition terminates. 16. The method of claim 14 , wherein the impedance of the bias circuit is gradually increased with a predetermined sequence of impedance steps. 17. The method of claim 14 , wherein gradually increasing the impedance comprises controlling a switch coupled to the input. 18. The method of claim 17 , wherein controlling the switch comprises applying a predetermined sequence of voltage steps to a gate of the switch. 19. The method of claim 18 , wherein the predetermined sequence of voltage steps is provided by a digital-to-analog converter (DAC).

Assignees

Inventors

Classifications

  • H04R1/08Primary

    Mouthpieces; {Microphones;} Attachments therefor · CPC title

  • with semiconductor devices only · CPC title

  • the amplifier being designed for audio applications · CPC title

  • Circuits for transducers (arrangements for producing a reverberation or echo sound G10K15/08; amplifiers H03F) · CPC title

  • Monitoring arrangements; Testing arrangements {(for hearing aids H04R25/30; detection of loudspeaker connection H04R5/04; sound-field adaptation dependent on speaker detection H04S7/308)} · CPC title

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What does patent US11750960B2 cover?
A microphone includes an amplifier coupled to an input node of the microphone; a shock detector coupled to the input node of the microphone; and a recovery circuit having an input coupled to an output of the shock detector, and an output coupled to the input of the microphone.
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H04R1/08. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 05 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).