System and method for efficient scalable software-defined NVMEoF front-end connectivity

US11748181B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11748181-B2
Application numberUS-202117243306-A
CountryUS
Kind codeB2
Filing dateApr 28, 2021
Priority dateApr 28, 2021
Publication dateSep 5, 2023
Grant dateSep 5, 2023

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A method, computer program product, and computer system for directing, by a computing device, an incoming Non-Volatile Memory express (NVMe) command to a kernel driver. The kernel driver may enqueue the incoming NVMe command until fetched by a user space. The NVMe command may be fetched from the kernel driver for processing. The NVMe command may be pushed to a user space block device of the user space.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer-implemented method comprising: directing, by a computing device, an incoming Non-Volatile Memory express (NVMe) command from a Non-Volatile Memory Express Target (NVMET) built-in protocol processor to a kernel driver, wherein the incoming NVMe command is directed by, at least, one or more NVMET transports; enqueuing, by the kernel driver, the incoming NVMe command until fetched by a user space; polling, by a component of a datapath process, for the incoming NVMe command; fetching the NVMe command from the kernel driver for processing by the datapath process; and pushing the NVMe command to a user space block device of the user space. 2. The computer-implemented method of claim 1 wherein a driver in a kernel space holds the incoming NVMe command until fetched by the datapath process. 3. The computer-implemented method of claim 2 wherein the driver in the kernel space allocates pages that are mapped to the datapath process. 4. The computer-implemented method of claim 2 wherein, when the datapath process completes the NVMe command, the datapath process pushes completion of the NVMe command to the driver in the kernel space. 5. The computer-implemented method of claim 4 wherein, when the datapath process pushes the completion of the NVMe command to the driver in the kernel space, the driver in the kernel space passes the completion of the NVMe command to a host. 6. The computer-implemented method of claim 3 wherein the datapath process includes a component that maps the pages to the kernel space. 7. The computer-implemented method of claim 3 wherein the datapath process includes a component that manages backend storage. 8. A computer program product residing on a non-transitory computer readable storage medium having a plurality of instructions stored thereon which, when executed across one or more processors, causes at least a portion of the one or more processors to perform operations comprising: directing an incoming Non-Volatile Memory express (NVMe) command from a Non-Volatile Memory Express Target (NVMET) built-in protocol processor to a kernel driver, wherein the incoming NVMe command is directed by, at least, one or more NVMET transports; enqueuing, by the kernel driver, the incoming NVMe command until fetched by a user space; polling, by a component of a datapath process, for the incoming NVMe command; fetching the NVMe command from the kernel driver for processing by the datapath process; and pushing the NVMe command to a user space block device of the user space. 9. The computer program product of claim 8 wherein a driver in a kernel space holds the incoming NVMe command until fetched by the datapath process. 10. The computer program product of claim 9 wherein the driver in the kernel space allocates pages that are mapped to the datapath process. 11. The computer program product of claim 9 wherein, when the datapath process completes the NVMe command, the datapath process pushes completion of the NVMe command to the driver in the kernel space. 12. The computer program product of claim 11 wherein, when the datapath process pushes the completion of the NVMe command to the driver in the kernel space, the driver in the kernel space passes the completion of the NVMe command to a host. 13. The computer program product of claim 10 wherein the datapath process includes a component that maps the pages to the kernel space. 14. The computer program product of claim 10 wherein the datapath process includes a component that manages backend storage. 15. A computing system including one or more processors and one or more memories configured to perform operations comprising: directing an incoming Non-Volatile Memory express (NVMe) command from a Non-Volatile Memory Express Target (NVMET) built-in protocol processor to a kernel driver, wherein the incoming NVMe command is directed by, at least, one or more NVMET transports; enqueuing, by the kernel driver, the incoming NVMe command until fetched by a user space; polling, by a component of a datapath process, for the incoming NVMe command; fetching the NVMe command from the kernel driver for processing by the datapath process; and pushing the NVMe command to a user space block device of the user space. 16. The computing system of claim 15 wherein a driver in a kernel space holds the incoming NVMe command until fetched by the datapath process. 17. The computing system of claim 16 wherein the driver in the kernel space allocates pages that are mapped to the datapath process. 18. The computing system of claim 16 wherein, when the datapath process completes the NVMe command, the datapath process pushes completion of the NVMe command to the driver in the kernel space. 19. The computing system of claim 18 wherein, when the datapath process pushes the completion of the NVMe command to the driver in the kernel space, the driver in the kernel space passes the completion of the NVMe command to a host. 20. The computing system of claim 17 wherein the datapath process includes at least one of: a component that maps the pages to the kernel space; and a component that manages backend storage.

Assignees

Inventors

Classifications

  • G06F9/545Primary

    where tasks reside in different layers, e.g. user- and kernel-space · CPC title

  • Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS] · CPC title

  • in relation to throughput · CPC title

  • G06F3/0659Primary

    Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title

  • where the program performs an interfacing function, e.g. device driver (G06F13/105 takes precedence; contention policies within device drivers G06F9/4881; scheduling within device drivers G06F9/52) · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11748181B2 cover?
A method, computer program product, and computer system for directing, by a computing device, an incoming Non-Volatile Memory express (NVMe) command to a kernel driver. The kernel driver may enqueue the incoming NVMe command until fetched by a user space. The NVMe command may be fetched from the kernel driver for processing. The NVMe command may be pushed to a user space block device of the use…
Who is the assignee on this patent?
Emc Ip Holding Co Llc
What technology area does this patent fall under?
Primary CPC classification G06F9/545. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Sep 05 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).