OR pulse combination digital photomultiplier

Patent metadata

Field	Value
Publication number	US-11747194-B2
Application number	US-202117799804-A
Country	US
Kind code	B2
Filing date	Feb 11, 2021
Priority date	Feb 14, 2020
Publication date	Sep 5, 2023
Grant date	Sep 5, 2023

Abstract

The photomultiplier includes a set of macrocells, each comprising at least two microcells, each being connected to an output node according to an OR diagram, and achieving great energy efficiency upon deactivating each of the microcells when these are activated almost simultaneously, and that otherwise would have been masked by the OR diagram. To this end, each of the microcells comprises an active quenching and recharge circuit; an avalanche diode; a first deactivation transistor with its gate connected to an external processor, and its drain and source associated with the active quenching and recharge circuit; a second deactivation transistor with its gate connected to an external processor, and its source associated with the active quenching and recharge circuit.

First claim

The invention claimed is:

1. An OR pulse combination digital photomultiplier, comprising at least one macrocell, each of which comprises at least two microcells, each of the microcells being connected to an output node according to an OR diagram and each of the microcells comprising:
an active quenching and recharge circuit,
an active recharge activation point associated with the active quenching and recharge circuit,
an avalanche diode sensitive to a single photon, with an anode connected to the active quenching and recharge circuit,
a first deactivation transistor with a gate connected to an external processor, and a drain and source associated with the active quenching and recharge circuit,
a second deactivation transistor with a gate connected to an external processor, a drain connected to the output node and a source associated with the active quenching and recharge circuit.

2. The photomultiplier of claim 1 , wherein the at least one macrocell further comprises a high-level attachment transistor with a drain connected to the output node.

3. The photomultiplier of claim 1 , wherein the active quenching and recharge circuit comprises:
a first transistor with a gate connected to the source of the second deactivation transistor, a drain connected to the anode of the avalanche diode and a source connected to a junction node between microcells,
a second transistor with a gate connected to the source of the second deactivation transistor, a drain connected to the drain of the first deactivation transistor and a source connected to an activation voltage,
a third transistor with a gate connected to the active recharge activation point, a drain connected to the source of the first deactivation transistor and a source connected to the junction node between microcells, and
a fourth transistor with a gate connected to the drain of the first and second transistors, a drain connected to the source of the second activation transistor and a source connected to earth.

4. The photomultiplier of claim 1 , wherein the at least one macrocell further comprises a monostable for generating an active recharge signal connected to the active recharge activation point.

Assignees

• Consejo Superior Investigacion
• Univ Sevilla

Inventors

• Vornicu Ion
• Carmona Galán Ricardo
• Rodríguez Vázquez Ángel

Classifications

• H10F77/959 Primary

  for devices working in avalanche mode · CPC title

• G01J1/44 Primary

  Electric circuits {(for command of an exposure part G03B7/02)} · CPC title

• G01J2001/4453

  PMT · CPC title

• G01J2001/4466

  Avalanche · CPC title

• G01J2001/442

  Single-photon detection or photon counting · CPC title