Multi-projector display architecture

Patent metadata

Field	Value
Publication number	US-11743435-B2
Application number	US-202117349769-A
Country	US
Kind code	B2
Filing date	Jun 16, 2021
Priority date	Feb 14, 2019
Publication date	Aug 29, 2023
Grant date	Aug 29, 2023

Abstract

In an embodiment, a headset display device includes a central processor and multiple projector integrated circuits for eyes of a wearer of the headset display device. Each eye of the wear is associated with at least three projector integrated circuits. Each of the three projector integrated circuits is communicatively coupled to the central processor. Each projector integrated circuit includes a first integrated circuit including a light emitter array having monochrome light emitters of a single color, and a second integrated circuit coupled to the first integrated circuit. The second integrated circuit includes a graphics processor configured to generate transformed image data. The graphics processor is configured to provide the transformed image data to the first integrated circuit. The first integrated circuit is configured to output the transformed image data using the light emitter array.

First claim

What is claimed is:

1. A headset display device comprising a central processor and a plurality of projector integrated circuits for eyes of a wearer of the headset display device, wherein each eye of the wearer is associated with at least three projector integrated circuits, and wherein each of the three projector integrated circuits is communicatively coupled to the central processor and comprises:
a first integrated circuit comprising a light emitter array having monochrome light emitters of a single color, where the light emitter array is supported by a designated backplane control integrated circuit associated with the monochrome light emitters within the first integrated circuit; and
a second integrated circuit coupled to the first integrated circuit, wherein the second integrated circuit comprises a graphics processor configured to receive image data and generate transformed image data based on the received image data, wherein the graphics processor is configured to provide the transformed image data to the first integrated circuit, wherein the first integrated circuit is configured to output the transformed image data using the light emitter array, wherein the first integrated circuit and the second integrated circuit are within a single chip, and wherein the first integrated circuit is configured to communicate with the second integrated circuit using through-silicon vias,
wherein the designated backplane control integrated circuits of the three projector integrated circuits are different, and the monochrome light emitters of the three projector integrated circuits emit different colors.

2. The headset display device of claim 1 , wherein the transformed image data is for correcting for one or more distortions comprising a geometrical distortion or a brightness distortion.

3. The headset display device of claim 2 , wherein the one or more distortions stem from a near eye display optical system comprising a display or a waveguide of the headset display device.

4. The headset display device of claim 1 , wherein the second integrated circuit further comprises a display driver integrated circuit configured to adjust display timing of one or more pixel colors of one or more displayed subframes, and wherein the one or more displayed subframes have finer gradations than a physical limitation of the light emitter arrays.

5. The headset display device of claim 1 , wherein the first integrated circuit is mounted on a surface of the second integrated circuit, and wherein the first integrated circuit and the second integrated circuit form a vertical three-dimensional stacking structure.

6. The headset display device of claim 1 , wherein the first integrated circuit is mounted next to the second integrated circuit on an interposer, and wherein the first integrated circuit and the second integrated circuit form a 2.5-dimensional structure.

7. The headset display device of claim 1 , wherein:
the central processor is configured to receive, from a first rendering device, data for images to be displayed by the headset display device;
the headset display device is configured to process the received data using the plurality of projector integrated circuits; and
the plurality of projector integrated circuits are configured to produce, using the light emitter array of each projector integrated circuit, light based on the processed data.

8. The headset display device of claim 7 , wherein the headset display device further comprises a waveguide configuration, and wherein the light produced by the light emitter array of each projector integrated circuit is directed through the waveguide configuration to at least one eye of the wearer of the headset display device.

9. The headset display device of claim 8 , wherein the data for images to be displayed by the headset display device is received from the first rendering device at a first rate and the received data is processed using the plurality of projector integrated circuits at a second rate, the second rate being greater than the first rate.

10. The headset display device of claim 7 , wherein the first rendering device is in wireless communication with the headset display device.

11. The headset display device of claim 1 , wherein the graphics processor is further configured to generate transformed image data based on a current viewpoint of the wearer.

12. The headset display device of claim 11 , wherein the headset display device further comprises a movement sensor or orientation sensor, and wherein the current viewpoint of the wearer is determined based on sensor data received from the movement sensor or orientation sensor.

13. The headset display device of claim 1 , wherein the graphics processor is further configured to apply geometric transformations to the received image data to correct chromatic aberrations.

14. The headset display device of claim 1 , wherein the graphics processor comprises:
a transform block configured to determine, based on a current viewpoint of the wearer, visibility information for virtual objects to be displayed in an artificial reality scene;
a pixel block configured to determine color values based on the determined visibility information; or
a display block configured to prepare the determined color values for output to a display driver.

15. The headset display device of claim 1 , wherein each light emitter array comprises μLEDs emitting light of a pre-determined color.

16. The headset display device of claim 1 , wherein the received image data has a first frame rate, and wherein the transformed image data has a second frame rate higher than the first frame rate.

17. The headset display device of claim 16 , wherein the transformed image data having the second frame rate is configured to allow multiple displayed subframes to be integrated over time by eyes of the wearer.

18. The headset display device of claim 1 , wherein the second integrated circuit comprises a display driver integrated circuit configured to adjust display positions of one or more pixel colors of one or more displayed subframes, and wherein the one or more displayed subframes have finer gradations than a physical limitation of the light emitter arrays.

19. A method, by a headset display device, comprising:
receiving, from a first rendering device, data for images to be displayed by the headset display device, wherein the headset display device comprises:
a central processor and a plurality of projector integrated circuits for eyes of a wearer of the headset display device, wherein each eye of the wear is associated with at least three projector integrated circuits, and wherein each of the three projector integrated circuits is communicatively coupled to the central processor and comprises:
a first integrated circuit comprising a light emitter array having monochrome light emitters of a single color, where the light emitter array is supported by a designated backplane control integrated circuit associated with the monochrome light emitters within the first integrated circuit; and
a second integrated circuit coupled to the first integrated circuit, wherein the second integrated circuit comprises a graphics processor configured to receive image data and generate transformed image data based on the received data, wherein the graphics processor is configured to provide the transformed image data to the first integrated circuit, wherein the first integrated circuit is configured to output the transformed image data using the light emitter array, wherein the first integrated circuit and the second integrated circu

Assignees

• Meta Platforms Tech Llc

Inventors

• Seiler Larry
• Blank William Thomas
• Hunt Warren Andrew
• Yee Michael

Classifications

• H04N9/3182 Primary

  Colour adjustment, e.g. white balance, shading or gamut (white balance per se H04N9/73; control of amplitude of colour signals H04N9/68; colour control circuits for displays in general G09G5/02, G09G3/2003, G09G3/3607) · CPC title

• G02B27/0172

  characterised by optical features · CPC title

• G09G3/32

  semiconductive, e.g. using light-emitting diodes [LED] · CPC title

• H04N9/3185

  Geometric adjustment, e.g. keystone or convergence (optical or mechanical adjustment of convergence H04N9/317; using scanning means H04N3/22; optical or mechanical adjustments of projectors not peculiar to the presence of an electronic spatial light modulator G03B21/14) · CPC title

• G02B2027/0178

  Eyeglass type (eyeglass details G02C) · CPC title