Co-packaged optics and transceiver
US-2020219865-A1 · Jul 9, 2020 · US
US11740420B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11740420-B2 |
| Application number | US-202217654129-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 9, 2022 |
| Priority date | Mar 11, 2021 |
| Publication date | Aug 29, 2023 |
| Grant date | Aug 29, 2023 |
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The invention relates to an optoelectronic device comprising a photonic interposer comprising: a photonic circuit containing at least one active optical component, an upper interconnect layer comprising at least one upper control portion, a lower interconnect layer comprising at least one lower control portion and lower intermediate portions, at least one TSV directly connecting the upper control portion to the lower control portion, conductive vias connecting the lower intermediate portions to the active optical component; at least one first microelectronic chip joined to the upper face of the photonic interposer; a second microelectronic chip joined to the lower face of the photonic interposer, and connected to the lower control portion and to the lower intermediate portions.
Opening claim text (preview).
The invention claimed is: 1. An optoelectronic device, comprising: a photonic interposer, having an upper face and an opposite, lower face, produced based on silicon, and comprising: a photonic circuit containing at least one active optical component, and an upper interconnect layer, defining the upper face, and comprising at least one first upper conductive control portion; at least one first microelectronic chip, joined to the upper face and connected to the first upper conductive control portion, intended to transmit or receive an electrical signal to or from a second microelectronic chip; the second microelectronic chip, called electro-optical conversion chip, joined and connected to the photonic interposer, which provides the electrical connection of the second microelectronic chip to the active optical component, on the one hand, and to the first microelectronic chip, on the other hand; the photonic interposer comprising: a lower interconnect layer, defining the lower face, comprising at least one first lower conductive control portion, and first lower conductive intermediate portions; at least one through-silicon via directly connecting the first upper conductive control portion to the first lower conductive control portion; conductive vias connecting the first lower conductive intermediate portions to the active optical component; the second microelectronic chip being joined to the lower face, and being connected to the first lower conductive control portion, on the one hand, and to the first lower conductive intermediate portions, on the other hand. 2. The optoelectronic device as claimed in claim 1 , wherein the photonic interposer comprises a stack of layers, including a thick silicon layer and an optical layer in which the photonic circuit is formed, the thick layer being situated towards the upper face and the optical layer being situated towards the lower face. 3. The optoelectronic device as claimed in claim 2 , wherein the photonic interposer comprises a dielectric layer made of a silicon oxide, and situated between and in contact with the thick layer and the optical layer. 4. The optoelectronic device as claimed in claim 1 , wherein the photonic interposer comprises first lower conductive power supply portions situated at the lower face and connected to an electric power source of the first microelectronic chip, and upper conductive power supply portions situated at the upper face and connected to the first lower conductive power supply portions by through-silicon vias, and the first microelectronic chip comprises conductive power supply portions connected to the upper conductive power supply portions. 5. The optoelectronic device as claimed in claim 1 , wherein the photonic interposer comprises second lower conductive power supply portions situated at the lower face and connected to an electric power source of the second microelectronic chip, and second conductive intermediate power supply portions situated at the lower face and connected to the second lower conductive power supply portions, and the second microelectronic chip comprises conductive power supply portions connected to the second conductive intermediate power supply portions. 6. The optoelectronic device as claimed in claim 5 , wherein the photonic interposer comprises one or more redistribution layers, comprising conductive lines and conductive vias, situated between and in contact with a lower dielectric layer and the lower interconnect layer, the redistribution layer providing the electrical connection between the second conductive intermediate power supply portions and the second lower conductive power supply portions. 7. The optoelectronic device as claimed in claim 1 , wherein the active optical component of the photonic circuit is chosen from an optical modulator, an optical filter and a photodiode. 8. The optoelectronic device as claimed in claim 1 , comprising external waveguides optically coupled to the photonic circuit of the photonic interposer. 9. The optoelectronic device as claimed in claim 1 , comprising an encapsulating layer extending over the upper face of the photonic interposer and coming into contact with the first microelectronic chip. 10. The optoelectronic device as claimed in claim 1 , wherein the photonic interposer has a thickness, between its lower and upper faces, of less than or equal to 200 μm. 11. The optoelectronic device as claimed in claim 1 , comprising a plurality of through-silicon vias directly connecting the first upper conductive control portion to the first lower conductive control portion, the first upper conductive control portions being connected to the first microelectronic chip by upper interconnect pads, and the first lower conductive control portions being connected to the second microelectronic chip by lower interconnect pads, the upper interconnect pads and the lower interconnect pads being arranged with a pitch less than or equal to 40 μm. 12. The optoelectronic device as claimed in claim 1 , wherein the second microelectronic chip is joined to the photonic interposer by way of lower interconnect pads, the latter being in contact with the second microelectronic chip and the photonic interposer. 13. The optoelectronic device as claimed in claim 1 , wherein the photonic interposer rests on a power supply support by way of power supply pads whose thickness is greater than that of the second microelectronic chip. 14. A method for manufacturing an optoelectronic device as claimed in claim 1 , comprising the following steps: providing an SOI substrate, comprising a thick silicon layer, a dielectric layer made of a silicon oxide, and a thin silicon layer; producing an optical layer from the thin silicon layer; producing through-silicon vias, in blind openings extending through the optical layer, the dielectric layer, and through part of the thick silicon layer; producing a lower dielectric layer extending over and in contact with the optical layer; producing the lower interconnect layer on a lower dielectric layer; joining a first handle substrate through direct bonding to the lower interconnect layer; thinning the thick silicon layer, so as to open out the through-silicon vias; producing the upper interconnect layer, in conductive portions in contact with the through-silicon vias; removing the first handle substrate. 15. The manufacturing method as claimed in claim 14 , comprising the following steps: before removing the first handle substrate, joining the first microelectronic chip to the upper interconnect layer, and depositing an encapsulating layer that covers the upper face; joining a second handle substrate to a free planar face formed by the first microelectronic chip and the encapsulating layer, and removing the first handle substrate; removing the second handle substrate; joining the second microelectronic chip.
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