Solid-state imaging device and amplifier array

Patent metadata

Field	Value
Publication number	US-11736835-B2
Application number	US-202117791004-A
Country	US
Kind code	B2
Filing date	Jan 6, 2021
Priority date	Jan 16, 2020
Publication date	Aug 22, 2023
Grant date	Aug 22, 2023

Abstract

A solid-state imaging device includes M pixel units to and a correction unit. The pixel unit includes a main amplifier, a capacitive element, a first switch, a second switch, a photodiode, a feedback capacitive element, and an initialization switch. The correction unit includes a null amplifier, a capacitive element, a first switch, and a second switch. An effective offset voltage of the main amplifier is small.

First claim

The invention claimed is:

1. A solid-state imaging device comprising:
a plurality of pixel units; a correction unit; and a control unit, wherein
each of the plurality of pixel units includes:
a main amplifier having a first input terminal, a second input terminal, a third input terminal, and an output terminal, and configured to output, from the output terminal, a voltage value according to a sum of a product of a first gain and a potential difference of the first input terminal with respect to the second input terminal and a product of a second gain and a potential difference of the third input terminal with respect to the second input terminal;
a capacitive element connected to the third input terminal of the main amplifier;
a first switch connected to the first input terminal of the main amplifier;
a second switch connected to the third input terminal of the main amplifier;
a photodiode connected to the first input terminal of the main amplifier;
a feedback capacitive element provided between the first input terminal and the output terminal of the main amplifier, and configured to accumulate a charge generated in the photodiode in response to light incidence; and
an initialization switch provided in parallel with the feedback capacitive element,
the correction unit includes:
a null amplifier having a first input terminal, a second input terminal, a third input terminal, and an output terminal, the first input terminal being connected to the first switch of each of the plurality of pixel units, the output terminal being connected to the second switch of each of the plurality of pixel units, and configured to output, from the output terminal, a voltage value according to a difference between a product of a first gain and a potential difference of the first input terminal with respect to the second input terminal and a product of a second gain and a potential difference of the third input terminal with respect to the second input terminal;
a capacitive element connected to the third input terminal of the null amplifier;
a first switch provided between the first input terminal and the second input terminal of the null amplifier; and
a second switch provided between the third input terminal and the output terminal of the null amplifier, and
the control unit is configured to:
perform initialization and charge accumulation of the feedback capacitive element by controlling ON/OFF of the initialization switch for each of the plurality of pixel units,
set the first switch and the second switch to an ON state sequentially for each of the plurality of pixel units, and
set the first switch and the second switch of the correction unit to the ON state in a period in which the first switches and the second switches of all of the plurality of pixel units are set to an OFF state.

2. The solid-state imaging device according to claim 1 , wherein the control unit is configured to set the first switch and the second switch of the correction unit to the ON state a plurality of times in a period in which the initialization switch is set to the OFF state and the charge accumulation is performed by the feedback capacitive element for each of the plurality of pixel units.

3. The solid-state imaging device according to claim 1 , comprising a plurality of sets of the plurality of pixel units and the correction unit.

4. The solid-state imaging device according to claim 3 , wherein the plurality of sets of the plurality of pixel units are arranged two-dimensionally.

5. The solid-state imaging device according to claim 1 , wherein the photodiode is formed of a compound semiconductor.

6. The solid-state imaging device according to claim 5 , wherein the photodiode is formed of an InGaAs-based or InAsSb-based compound semiconductor.

7. An amplifier array comprising:
a plurality of pixel units; and a correction unit formed on a first semiconductor substrate, wherein
each of the plurality of pixel units includes:
a main amplifier having a first input terminal, a second input terminal, a third input terminal, and an output terminal, and configured to output, from the output terminal, a voltage value according to a sum of a product of a first gain and a potential difference of the first input terminal with respect to the second input terminal and a product of a second gain and a potential difference of the third input terminal with respect to the second input terminal;
a capacitive element connected to the third input terminal of the main amplifier;
a first switch connected to the first input terminal of the main amplifier;
a second switch connected to the third input terminal of the main amplifier;
a feedback capacitive element provided between the first input terminal and the output terminal of the main amplifier; and
an initialization switch provided in parallel with the feedback capacitive element, and
the correction unit includes:
a null amplifier having a first input terminal, a second input terminal, a third input terminal, and an output terminal, the first input terminal being connected to the first switch of each of the plurality of pixel units, the output terminal being connected to the second switch of each of the plurality of pixel units, and configured to output, from the output terminal, a voltage value according to a difference between a product of a first gain and a potential difference of the first input terminal with respect to the second input terminal and a product of a second gain and a potential difference of the third input terminal with respect to the second input terminal;
a capacitive element connected to the third input terminal of the null amplifier;
a first switch provided between the first input terminal and the second input terminal of the null amplifier; and
a second switch provided between the third input terminal and the output terminal of the null amplifier.

8. The amplifier array according to claim 7 , wherein a control unit is formed on the first semiconductor substrate, and
the control unit is configured to:
control ON/OFF of the initialization switch for each of the plurality of pixel units,
set the first switch and the second switch to an ON state sequentially for each of the plurality of pixel units, and
set the first switch and the second switch of the correction unit to the ON state in a period in which the first switches and the second switches of all of the plurality of pixel units are set to an OFF state.

9. The amplifier array according to claim 7 , wherein a plurality of sets of the plurality of pixel units and the correction unit are formed on the first semiconductor substrate.

10. A solid-state imaging device comprising:
the amplifier array according to claim 7 ; and
a photodiode array including a plurality of photodiodes formed on a second semiconductor substrate, wherein
the first input terminal of the main amplifier of each pixel unit in the amplifier array and each photodiode in the photodiode array are connected in one-to-one correspondence.

11. The solid-state imaging device according to claim 10 , wherein the photodiode is formed of a compound semiconductor.

12. The solid-state imaging device according to claim 11 , wherein the photodiode is formed of an InGaAs-based or InAsSb-based compound semiconductor.

Assignees

• Hamamatsu Photonics Kk

Inventors

• Kobayashi Makoto
• Suzuki Chihiro
• Morita Sho
• Yamamoto Hiroo

Classifications

• H10F77/1248

  having three or more elements, e.g. GaAlAs, InGaAs or InGaAsP · CPC title

• H04N25/778 Primary

  comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself · CPC title

• H03F3/16

  with field-effect devices · CPC title

• H01L31/03046

  Electricity · mapped topic

• H03F2200/144

  the feedback circuit of the amplifier stage comprising a passive resistor and passive capacitor · CPC title