Magnetic core with vertical laminations having high aspect ratio

US11735349B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11735349-B2
Application numberUS-201916557476-A
CountryUS
Kind codeB2
Filing dateAug 30, 2019
Priority dateAug 30, 2019
Publication dateAug 22, 2023
Grant dateAug 22, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for manufacturing a vertically-laminated ferromagnetic core includes (a) depositing a conductive seed layer on or over a first side of a substrate; (b) depositing a masking layer on or over a second side of the substrate, the first and second sides on opposite sides of the substrate; (c) forming a pattern in the masking layer; (d) dry etching the substrate, based on the pattern in the masking layer, from the second side to the first side to expose portions of the conductive seed layer; and (e) depositing a ferromagnetic material onto the exposed portions of the conductive seed layer to form vertically-oriented ferromagnetic layers.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for manufacturing a vertically-laminated ferromagnetic core, comprising: depositing a conductive seed layer on or over a first side of a substrate; depositing a masking layer on or over a second side of the substrate, the first and second sides on opposite sides of the substrate; forming a pattern in the masking layer; dry etching the substrate, based on the pattern in the masking layer, from the second side to the first side to expose portions of the conductive seed layer; and depositing a ferromagnetic material onto the exposed portions of the conductive seed layer to form vertically-oriented ferromagnetic layers. 2. The method of claim 1 , wherein the substrate comprises a bare silicon substrate or a silicon-on-insulator (SOI) substrate, the SOI substrate comprising a layer of SiO 2 and/or Si x N y on the bare silicon substrate. 3. The method of claim 1 , wherein etching the substrate includes deep reactive ion etching the substrate. 4. The method of claim 1 , wherein the pattern in the masking layer comprises concentric circles, the ferromagnetic material deposited on the portions of the conductive seed layer according to the pattern. 5. The method of claim 1 , wherein the masking layer comprises a photoresist. 6. The method of claim 5 , wherein the pattern in the masking layer is formed through photolithography. 7. The method of claim 1 , wherein each vertically-oriented ferromagnetic layer has a width of about 5 nm to about 50 μm, the width determined with respect to a width axis that is parallel to a plane defined by the first side of the substrate. 8. The method of claim 7 , wherein each vertically-oriented ferromagnetic layer has a height of about 100 μm to about 800 μm, the height determined with respect to a height axis that is orthogonal to the plane defined by the first side of the substrate. 9. The method of claim 8 , wherein the height of each vertically-oriented ferromagnetic layer is the same as a height of the substrate. 10. The method of claim 1 , further comprising removing the masking layer with a solvent, a wet etch, or a dry etch. 11. The method of claim 10 , further comprising removing the conductive seed layer with a wet etch or a dry etch. 12. The method of claim 11 , further comprising depositing a passivation layer on the first and second sides of the substrate. 13. The method of claim 1 , wherein the masking layer comprises SiO 2 or Si x N y and the method further comprises depositing photoresist on the masking layer. 14. The method of claim 13 , further comprising forming a first pattern in the photoresist through photolithography. 15. The method of claim 14 , further comprising etching a second pattern in the masking layer based on the first pattern. 16. The method of claim 15 , further comprising etching the substrate based on the second pattern in the masking layer. 17. The method of claim 1 , further comprising electrodepositing the ferromagnetic material. 18. The method of claim 17 , further comprising applying a magnetic field during the electrodepositing step, the magnetic field passing through the substrate in parallel to a reference axis, the reference axis orthogonal to a plane defined by the first side of the substrate. 19. The method of claim 18 , further comprising inducing an easy axis of magnetization in the ferromagnetic material, the easy axis of magnetization parallel to the reference axis. 20. The method of claim 19 , further comprising inducing a hard axis of magnetization in the ferromagnetic material, the hard axis of magnetization orthogonal to the easy axis of magnetization. 21. A method for manufacturing an inductor having a vertically-laminated ferromagnetic core, comprising: depositing a conductive seed layer on or over a first side of a substrate; depositing a masking layer on or over a second side of the substrate, the first and second sides on opposite sides of the substrate; forming a pattern in the masking layer; dry etching the substrate, based on the pattern in the masking layer, from the second side to the first side to expose portions of the conductive seed layer; depositing a ferromagnetic material onto the exposed portions of the conductive seed layer to form vertically-oriented ferromagnetic layers to thereby form the vertically-laminated ferromagnetic core; removing the conductive seed layer to expose the first side of the substrate; removing the masking layer to expose the second side of the substrate; and forming a conductive coil around the vertically-laminated ferromagnetic core. 22. The method of claim 21 , further comprising after removing the conductive seed layer and the masking layer, depositing first and second passivation layers on the first and second sides of the substrate, respectively. 23. The method of claim 22 , further comprising forming first and second wire segments in the first and second passivation layers, respectively. 24. The method of claim 23 , further comprising forming first and second VIAs in the substrate, each VIA electrically coupling the first and second wire segments. 25. The method of claim 21 , wherein the substrate is a core substrate and the method further comprises after removing the conductive seed layer and the masking layer, attaching first and second substrates to the first and second sides of the core substrate, respectively. 26. The method of claim 25 , further comprising forming first and second wire segments in the first and second substrates, respectively. 27. The method of claim 26 , further comprising forming first and second VIAs in the core substrate, each VIA electrically coupling the first and second wire segments.

Assignees

Inventors

Classifications

  • H01F27/24Primary

    Magnetic cores · CPC title

  • made from strips or ribbons (H01F27/26 takes precedence) · CPC title

  • Manufacturing of magnetic circuits made from strip(s) or ribbon(s) (magnetic cores made by winding a ribbon H01F27/25) · CPC title

  • by cathode sputtering · CPC title

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What does patent US11735349B2 cover?
A method for manufacturing a vertically-laminated ferromagnetic core includes (a) depositing a conductive seed layer on or over a first side of a substrate; (b) depositing a masking layer on or over a second side of the substrate, the first and second sides on opposite sides of the substrate; (c) forming a pattern in the masking layer; (d) dry etching the substrate, based on the pattern in the …
Who is the assignee on this patent?
Ferric Inc
What technology area does this patent fall under?
Primary CPC classification H01F27/24. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 22 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).