Operation processing apparatus, information processing apparatus, and method of controlling operation processing apparatus
US-2018349061-A1 · Dec 6, 2018 · US
US11734225B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11734225-B2 |
| Application number | US-202016945295-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 31, 2020 |
| Priority date | Feb 8, 2019 |
| Publication date | Aug 22, 2023 |
| Grant date | Aug 22, 2023 |
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a Systems and methods are provided for matrix tiling to accelerate computing in redundant matrices. The method may include identifying unique submatrices in the matrix; loading values of elements of each unique submatrix into a respective one of the array processors; applying the vector to inputs of each of the array processors; and adding outputs of the array processors according to locations of the unique submatrices in the matrix.
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What is claimed is: 1. A non-transitory machine readable medium, including instructions that when executed by a processor causes the processor to: identify at least one unique submatrix in an input matrix; iteratively load values of elements of the at least one submatrix into an array of processors; apply a vector to the loaded values of elements of each of the array of processors; add outputs of the array processors according to a location of the at least one unique submatrix at the input matrix. 2. The non-transitory machine readable medium of claim 1 , further comprising instructions to generate a new vector based on the added outputs. 3. The non-transitory machine readable medium of claim 2 , wherein generating the new vector comprises filtering the added outputs. 4. The non-transitory machine readable medium of claim 1 , further comprising instructions to apply the new vector to the loaded values of elements of each of the array of processors. 5. The non-transitory machine readable medium of claim 1 , wherein each row of the at least one submatrix is processed in order. 6. The non-transitory machine readable medium of claim 1 , wherein each row of the at least one submatrix is processed concurrently. 7. A method comprising: identifying unique submatrices in a matrix; loading values of elements of each unique submatrix into an array processor of a plurality of array processors; applying a vector to the loaded values of each of the array processors; and adding outputs of the array processors according to a location of the unique submatrices in the matrix. 8. The method of claim 7 , wherein each array processor comprises N row lines, N column lines, and N2 memory cells each coupled between a respective combination of one of the row lines and one of the column lines. 9. The method of claim 8 , further comprising storing values of elements of the matrix at the memory cells.
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