Method and apparatus for determining jitter, storage medium and electronic device

Patent metadata

Field	Value
Publication number	US-11733293-B2
Application number	US-202117210324-A
Country	US
Kind code	B2
Filing date	Mar 23, 2021
Priority date	Nov 14, 2018
Publication date	Aug 22, 2023
Grant date	Aug 22, 2023

Abstract

A method and apparatus for determining jitter, a storage medium and an electronic device are disclosed. The method for determining jitter includes: determining a plurality of measurement time points for an output signal from an integrated circuit (IC); identifying one or more jitter points from the plurality of measurement time points by comparing the output signal with a predetermined signal at the plurality of measurement time points; and determining a jitter of the output signal of the IC based on the one or more jitter points. The jitter of the output signal of an IC chip can be determined without relying on any other additional equipment.

First claim

The invention claimed is:

1. A method for determining jitter, comprising:
repeatedly inputting an input signal to an integrated circuit and obtaining a corresponding output signal of the integrated circuit;
determining a plurality of measurement time points for the output signals of the integrated circuit;
identifying, by comparing at least one of the obtained output signals with a predetermined signal at the plurality of measurement time points, one or more jitter points from the plurality of measurement time points; and
determining, based on the one or more jitter points, a jitter of the output signals of the integrated circuit,
wherein identifying one or more jitter points from the plurality of measurement time points comprises:
comparing, at each of the plurality of measurement time points, at least one of the obtained output signals with the predetermined signal;
determining, in response to that the at least one of the obtained output signals is consistent with the predetermined signal at a first measurement time point of the plurality of measurement time points, that the first measurement time point of the plurality of measurement time points is not a jitter point; and
determining, in response to that the at least one of the obtained output signals is inconsistent with the predetermined signal at a second measurement time point of the plurality of measurement time points, that the second measurement time point of the plurality of measurement time points is the jitter point,
wherein the predetermined signal is an expected output signal for the integrated circuit.

2. The method of claim 1 , wherein comparing at least one of the obtained output signals with the predetermined signal comprises:
comparing, at each of the plurality of measurement time points, each of the obtained output signals with the predetermined signal; and
obtaining, based on a comparison result of each of the obtained output signals with the predetermined signal, a statistical result for the plurality of measurement time points.

3. The method of claim 2 , wherein determining, in response to that the at least one of the obtained output signals is consistent with the predetermined signal at the first measurement time point of the plurality of measurement time points, that the first measurement time point of the plurality of measurement time points is not the jitter point comprises:
determining, based on all the obtained output signals being consistent with the predetermined signal at the first measurement time point, that the first measurement time point is not the jitter point.

4. The method of claim 3 , wherein comparing, at each of the plurality of measurement time points, each of the obtained output signals with the predetermined signal comprises:
determining, based on at least one of the obtained output signals being inconsistent with the predetermined signal at the measurement time point, that the measurement time point corresponding to the at least one of the obtained output signals is the jitter point.

5. The method of claim 1 , wherein identifying one or more jitter points from the plurality of measurement time points comprises:
comparing, at each of the plurality of measurement time points, each of the obtained output signals with the predetermined signal; and
determining, based on comparison results of the obtained output signals to the predetermined signal at each measurement time point, whether each of the plurality of measurement time points is a jitter point,
wherein the predetermined signal is a predetermined threshold.

6. The method of claim 5 , wherein determining whether each of the plurality of measurement time points is the jitter point comprises:
determining, in response to the comparison results of the obtained output signals being identical to the predetermined signal at a measurement time point, that the measurement time point is not the jitter point; and
determining, in response to the comparison results of the obtained output signals being not identical to the predetermined signal at the measurement time point, that the measurement time point is the jitter point.

7. The method of claim 6 , wherein the comparison results of one of the obtained output signals to the predetermined signal at the measurement time point comprises a first result and a second result, the first result representing the one of the obtained output signals being higher than or equal to the predetermined signal at the measurement time point, the second result representing the one of the obtained output signals being lower than the predetermined signal at the measurement time point.

8. The method of claim 1 , wherein determining the plurality of measurement time points for the output signals of the integrated circuit comprises:
determining, based on a predetermined rule, a plurality of discrete time points as the plurality of measurement time points for the output signals.

9. The method of claim 1 , wherein determining the plurality of measurement time points for the output signals of the integrated circuit comprises:
determining the plurality of measurement time points for an output voltage signal from a data strobe pin and/or a data input/output pin of a dynamic random-access memory chip.

10. The method of claim 9 , wherein determining the plurality of measurement time points for the output voltage signal from the data strobe pin and/or the data input/output pin of the dynamic random-access memory chip comprises:
detecting the output voltage signal from the data strobe pin or the data input/output pin of the dynamic random-access memory chip; and
determining the plurality of measurement time points on a rising edge or a falling edge of the output voltage signal.

11. The method of claim 1 , wherein determining, based on the one or more jitter points, the jitter of the output signals of the integrated circuit comprises:
chronically sorting the one or more jitter points based on the corresponding measurement time points; and
determining the jitter of the output signals as a time interval between an earliest jitter point and a latest jitter point.

12. The method of claim 1 , wherein determining, based on the one or more jitter points, the jitter of the output signals of the integrated circuit comprises:
creating, based on test results at the plurality of measurement time points, a shmoo plot; and
determining, based on the shmoo plot, the jitter of the output signals.

13. An apparatus for determining jitter, comprising a processor and a memory device configured to store computer instructions executable by the processor, wherein the processor is configured to execute the computer instructions to perform operations comprising:
repeatedly inputting an input signal to an integrated circuit and obtaining a corresponding output signal of the integrated circuit;
determining a plurality of measurement time points for the output signals of the integrated circuit;
identifying, by comparing at least one of the output signals with a predetermined signal at the plurality of measurement time points, one or more jitter points from the plurality of measurement time points; and
determining, based on the one or more jitter points, a jitter of the output signals of the integrated circuit,
wherein identifying one or more jitter points from the plurality of measurement time points comprises:
comparing, at each of the plurality of measurement time points, at least one of the obtained output signals with the predetermined signal;
determining, in response to that the at least one of the obtained output signals is consistent with the predetermined signal at a first measuremen

Assignees

• Changxin Memory Tech Inc

Inventors

• Lu Tianchen
• Lee Yuan Chieh

Classifications

• G01R31/2882 Primary

  Testing timing characteristics · CPC title

• G01R31/2856

  Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM] · CPC title

• G01R31/31713

  Input or output interfaces for test, e.g. test pins, buffers (for scan test G01R31/318572) · CPC title

• G01R31/31718

  Logistic aspects, e.g. binning, selection, sorting of devices under test, tester/handler interaction networks, Test management software, e.g. software for test statistics or test evaluation, yield analysis (mechanical aspects G01R31/2808, G01R31/2851) · CPC title

• G01R31/31726

  Synchronization, e.g. of test, clock or strobe signals; Signals in different clock domains; Generation of Vernier signals; Comparison and adjustment of the signals · CPC title