Modular motion estimation engine for tree-based video

US11729416B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11729416-B2
Application numberUS-201716651641-A
CountryUS
Kind codeB2
Filing dateDec 29, 2017
Priority dateDec 29, 2017
Publication dateAug 15, 2023
Grant dateAug 15, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

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An embodiment of a semiconductor package apparatus may include technology to determine a residual error based on coding unit information, and determine a candidate coding unit and an associated rate distortion cost based on the residual error. An embodiment may additionally or alternatively include technology to partition a first coding unit into two or more smaller coding units based on a partition message, accelerate processing of at least one of the two or more smaller coding units, and estimate motion fora frame based at least partially on results of the accelerated processing. Other embodiments are disclosed and claimed.

First claim

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We claim: 1. A motion estimation system, comprising: a processor; memory communicatively coupled to the processor; and logic communicatively coupled to the processor to: determine a residual error based on coding unit information and a merge list, determine merge information based on a zero coding bit factor, and determine a candidate coding unit, an associated rate distortion cost, and edge pixel information based on the residual error and the merge information. 2. The system of claim 1 , wherein the logic is further to: determine the residual error based on the coding unit information and one or more of a fractional motion estimate and a bidirectional motion estimate; determine inter-frame information based on a zero coding bit factor; and determine the candidate coding unit, the associated rate distortion cost, and the edge pixel information based on the residual error and the inter-frame information. 3. The system of claim 2 , wherein the logic is further to: determine one or more of the fractional motion estimate and the bidirectional motion estimate based on a depth first search and a breadth first search. 4. The system of claim 1 , wherein the logic is further to: determine the residual error based on the coding unit information and an intra-frame mode search with information related to one or more reconstructed neighbor pixels; determine intra-frame information based on the zero coding bit factor; and determine the candidate coding unit, the associated rate distortion cost, and the edge pixel information based on the residual error and the intra-frame information. 5. The system of claim 1 , wherein the logic is further to: perform an integer motion search based on another set of coding unit information; determine partition unit candidates based on the integer motion search; and determine another candidate coding unit based on the partition unit candidates. 6. A semiconductor package apparatus, comprising: one or more substrates; and logic coupled to the one or more substrates, wherein the logic is at least partly implemented in one or more of configurable logic and fixed-functionality hardware logic, the logic coupled to the one or more substrates to: determine a residual error based on coding unit information and one or more of a fractional motion estimate and a bidirectional motion estimate, determine inter-frame information based on a zero coding bit factor, and determine a candidate coding unit, an associated rate distortion cost, and edge pixel information based on the residual error and the inter-frame information. 7. The apparatus of claim 6 , wherein the logic is further to: determine the residual error based on the coding unit information and a merge list; determine merge information based on the zero coding bit factor; and determine the candidate coding unit, the associated rate distortion cost, and the edge pixel information based on the residual error and the merge information. 8. The apparatus of claim 6 , wherein the logic is further to: determine one or more of the fractional motion estimate and the bidirectional motion estimate based on a depth first search and a breadth first search. 9. The apparatus of claim 6 , wherein the logic is further to: determine the residual error based on the coding unit information and an intra-frame mode search with information related to one or more reconstructed neighbor pixels; determine intra-frame information based on the zero coding bit factor; and determine the candidate coding unit, the associated rate distortion cost, and the edge pixel information based on the residual error and the intra-frame information. 10. The apparatus of claim 6 , wherein the logic is further to: perform an integer motion search based on another set of coding unit information; determine partition unit candidates based on the integer motion search; and determine another candidate coding unit based on the partition unit candidates. 11. The apparatus of claim 6 , wherein the logic coupled to the one or more substrates includes transistor channel regions that are positioned within the one or more substrates. 12. A method of estimating motion, comprising: determining a residual error based on coding unit information and an intra-frame mode search with information related to one or more reconstructed neighbor pixels; determining intra-frame information based on a zero coding bit factor; and determining a candidate coding unit, an associated rate distortion cost, and edge pixel information based on the residual error and the intra-frame information. 13. The method of claim 12 , further comprising: determining the residual error based on the coding unit information and a merge list; determining merge information based on the zero coding bit factor; and determining the candidate coding unit, the associated rate distortion cost, and the edge pixel information based on the residual error and the merge information. 14. The method of claim 12 , further comprising: determining the residual error based on the coding unit information and one or more of a fractional motion estimate and a bidirectional motion estimate; determining inter-frame information based on the zero coding bit factor; and determining the candidate coding unit, the associated rate distortion cost, and the edge pixel information based on the residual error and the inter-frame information. 15. The method of claim 14 , further comprising: determining one or more of the fractional motion estimate and the bidirectional motion estimate based on a depth first search and a breadth first search. 16. The method of claim 12 , further comprising: performing an integer motion search based on another set of coding unit information; determining partition unit candidates based on the integer motion search; and determining another candidate coding unit based on the partition unit candidates. 17. At least one non-transitory computer readable medium, comprising a set of instructions, which when executed by a computing device, cause the computing device to: determine a residual error based on coding unit information and a merge list; determine merge information based on a zero coding bit factor; and determine a candidate coding unit, an associated rate distortion cost, and edge pixel information based on the residual error and the merge information. 18. The at least one non-transitory computer readable medium of claim 17 , comprising a further set of instructions, which when executed by the computing device, cause the computing device to: determine the residual error based on the coding unit information and one or more of a fractional motion estimate and a bidirectional motion estimate; determine inter-frame information based on the zero coding bit factor; and determine the candidate coding unit, the associated rate distortion cost, and the edge pixel information based on the residual error and the inter-frame information. 19. The at least one non-transitory computer readable medium of claim 18 , comprising a further set of instructions, which when executed by the computing device, cause the computing device to: determine one or more of the fractional motion estimate and the bidirectional motion estimate based on a depth first search and a breadth first search. 20. The at least one non-transitory computer readable medium of claim 17 , comprising a further set of instructions, which when executed by the computing device, cause the computing device to: det

Assignees

Inventors

Classifications

  • H04N19/577Primary

    Motion compensation with bidirectional frame interpolation, i.e. using B-pictures · CPC title

  • for estimating the reliability of the determined motion vectors or motion vector field, e.g. for smoothing the motion vector field or for correcting motion vectors · CPC title

  • H04N19/567Primary

    Motion estimation based on rate distortion criteria · CPC title

  • Tree coding, e.g. quad-tree coding · CPC title

  • in combination with predictive coding · CPC title

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What does patent US11729416B2 cover?
An embodiment of a semiconductor package apparatus may include technology to determine a residual error based on coding unit information, and determine a candidate coding unit and an associated rate distortion cost based on the residual error. An embodiment may additionally or alternatively include technology to partition a first coding unit into two or more smaller coding units based on a part…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification H04N19/577. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 15 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).