Rectangular waveguide communication between memory and processor

Patent metadata

Field	Value
Publication number	US-11728555-B2
Application number	US-202117461539-A
Country	US
Kind code	B2
Filing date	Aug 30, 2021
Priority date	Sep 25, 2018
Publication date	Aug 15, 2023
Grant date	Aug 15, 2023

Abstract

Disclosed herein is an apparatus that includes a memory, a processor, and a rectangular waveguide coupled to the memory and the processor so that the memory and the processor communicate with each other via the rectangular waveguide.

First claim

The invention claimed is:

1. An apparatus comprising:
a rectangular waveguide having first and second antennas provided inside a hollow of the rectangular waveguide;
a memory having a plurality of data I/o terminals;
a processor having a plurality of data I/O terminals;
a first circuit coupled between the data I/O terminals of the memory and the first antenna of the rectangular waveguide; and
a second circuit coupled between the data terminals of the processor and the second antenna of the rectangular waveguide.

2. The apparatus of claim 1 , further comprising:
a first transmission line coupled between the first circuit and the first antenna of the rectangular waveguide; and
a second transmission line coupled between the second circuit and the second antenna of the rectangular waveguide,
wherein the first and second transmission lines transmits a signal in a TEM mode.

3. The apparatus of claim 2 , wherein each of the first and second transmission lines includes a microstrip line or a coaxial line.

4. The apparatus of claim 2 , wherein each of the first and second antennas is configured to convert a signal between a TEM mode and a TE mode or TM mode.

5. The apparatus of claim 1 , further comprising a waveguide terminator provided at an end of the rectangular waveguide.

6. The apparatus of claim 1 , wherein the first circuit is configured to serially receive data provided by the memory and modulate signals to be transmitted via the first antenna, and wherein the second circuit is configured to modulate signals received via the second antenna.

7. The apparatus of claim 1 , wherein the rectangular waveguide has a third antenna, and the apparatus further comprises:
a second memory having a plurality of data I/O terminals; and
a third circuit coupled between the data I/O terminals of the second memory and the third antenna of the rectangular waveguide.

8. The apparatus of claim 1 wherein the memory has a second plurality of data I/O terminals and the rectangular waveguide has a third antenna, and the apparatus further comprises a third circuit coupled between the second plurality of data I/O terminals and the third antenna of the rectangular waveguide.

Assignees

• Micron Technology Inc

Inventors

• Koya Yoshihito

Classifications

• H01P3/12 Primary

  Hollow waveguides (H01P3/20 takes precedence) · CPC title

• G06F13/1668 Primary

  Details of memory controller · CPC title

• G06F13/4068

  Electrical coupling · CPC title

• H01P1/24

  Terminating devices · CPC title

• H05K1/0243

  Printed circuits associated with mounted high frequency components · CPC title