Driving substrate and manufacturing method thereof and display device

Patent metadata

Field	Value
Publication number	US-11728352-B2
Application number	US-202117354007-A
Country	US
Kind code	B2
Filing date	Jun 22, 2021
Priority date	Jul 27, 2020
Publication date	Aug 15, 2023
Grant date	Aug 15, 2023

Abstract

The present disclosure provides a driving substrate including: a flexible substrate base, a plurality of thin film transistors on the flexible substrate base and a first conductive pattern layer on a side of the thin film transistors distal to the flexible substrate base. The first conductive pattern layer includes: a plurality of first connection terminals in the display region and a plurality of signal supply lines in the bendable region. A first number of first connection terminals are electrically coupled to first electrodes of the plurality of thin film transistors. The plurality of signal supply lines are coupled to a second number of first connection terminals other than the first number of first connection terminals. At least one inorganic insulating layer including a hollowed-out pattern in the bendable region is between the first conductive pattern layer and the flexible substrate base.

First claim

What is claimed is:

1. A driving substrate, comprising:
a flexible substrate base, a plurality of thin film transistors on the flexible substrate base and a first conductive pattern layer on a side of the plurality of thin film transistors distal to the flexible substrate base; wherein
the flexible substrate base comprises: a display region, a bendable region and a bonding region, the bendable region is between the display region and the bonding region, and the plurality of thin film transistors are in the display region;
the first conductive pattern layer comprises: a plurality of first connection terminals and a plurality of signal supply lines, the plurality of first connection terminals are in the display region, a first number of first connection terminals of the plurality of first connection terminals are electrically coupled to first electrodes of the plurality of thin film transistors respectively, the plurality of signal supply lines are in the bendable region, two ends of each of the plurality of signal supply lines extend into the display region and the bonding region respectively, and the plurality of signal supply lines are electrically coupled to a second number of first connection terminals other than the first number of first connection terminals of the plurality of first connection terminals in the display region; and
at least one inorganic insulating layer is between the first conductive pattern layer and the flexible substrate base, and the at least one inorganic insulating layer comprises a hollowed-out pattern in the bendable region.

2. The driving substrate of claim 1 , wherein a portion of the at least one inorganic insulating layer in the bendable region has a thickness in a range from 0 Å to 2000 Å in a direction perpendicular to the flexible substrate base.

3. The driving substrate of claim 2 , further comprising an isolation barrier layer between the flexible substrate base and the plurality of thin film transistors,
wherein a portion of the isolation barrier layer in the display region has a thickness larger than a portion of the isolation barrier layer in the bendable region, and the at least one inorganic insulating layer comprises the isolation barrier layer.

4. The driving substrate of claim 3 , wherein the portion of the isolation barrier layer in the display region has a thickness in a range from 6500 Å to 9500 Å;
a portion of the isolation barrier layer in the bendable region and overlappinged with the plurality of signal supply lines in the direction perpendicular to the flexible substrate base has a thickness in a range from 1000 Å to 2000 Å; and
a portion of the isolation barrier layer in the bendable region and not overlappinged with the plurality of signal supply lines in the direction perpendicular to the flexible substrate base has a thickness of zero.

5. The driving substrate of claim 4 , wherein the first conductive pattern layer further comprises: a plurality of second connection terminals in the bonding region, and the plurality of second connection terminals are electrically coupled to the plurality of signal supply lines, respectively.

6. The driving substrate of claim 5 , further comprising a first planarization layer on a side of the first conductive pattern layer distal to the flexible substrate base; wherein
a plurality of first vias respectively extending to the plurality of first connection terminals are provided in the first planarization layer at positions corresponding to the plurality of first connection terminals in the direction perpendicular to the flexible substrate base; and
a plurality of second vias respectively extending to the plurality of second connection terminals are provided in the first planarization layer at positions corresponding to the plurality of second connection terminals in the direction perpendicular to the flexible substrate base.

7. The driving substrate of claim 6 , wherein each of the plurality of thin film transistors comprises an active layer, a first gate, a corresponding first electrode of the first electrodes and a second electrode;
the driving substrate further comprises a gate insulating layer between the active layer and the first gate in the direction perpendicular to the flexible substrate base, and an interlayer dielectric layer between the first and second electrodes and the active layer,
the first and second electrodes are coupled to the active layer through vias in the interlayer dielectric layer, respectively; and
the at least one inorganic insulating layer comprises the isolation barrier layer, the gate insulating layer and the interlayer dielectric layer.

8. The driving substrate of claim 7 , wherein each of the plurality of thin film transistors further comprises a second gate;
the second gate is on a side of the active layer proximal to the flexible substrate base, and a buffer layer is formed between the second gate and the active layer;
the first gate is on a side of the active layer distal to the flexible substrate base, the first and second electrodes are on a side of the first gate distal to the flexible substrate base, and the first gate is electrically coupled to the second gate; and
the at least one inorganic insulating layer further comprises the buffer layer.

9. The driving substrate of claim 8 , further comprising a second conductive pattern layer between the first conductive pattern layer and the plurality of thin film transistors; wherein
the second conductive pattern layer comprises: a plurality of signal transmission lines, through which the second number of first connection terminals other than the first number of first connection terminals of the plurality of first connection terminals are electrically coupled to corresponding signal supply lines of the plurality of signal supply lines, respectively.

10. The driving substrate of claim 9 , wherein the second conductive pattern layer is in a same layer as the first and second electrodes.

11. The driving substrate of claim 10 , further comprising a second planarization layer on a side of the second conductive pattern layer distal to the flexible substrate base, and a first passivation layer on a side of the second planarization layer distal to the flexible substrate base, wherein
the second planarization layer comprises a hollowed-out pattern in the bendable region;
the first conductive pattern layer is on a side of the first passivation layer distal to the flexible substrate base; and
the at least one inorganic insulating layer further comprises the first passivation layer.

12. The driving substrate of claim 1 , wherein the flexible substrate base further comprises an expanding region on a side of the bonding region distal to the display region;
the bendable region, the bonding region and the expanding region are sequentially arranged in a preset direction;
the bendable region has a width in a range from 15 mm to 25 mm in the preset direction;
the bonding region has a width in a range from 3.5 mm to 4.5 mm in the preset direction; and
the expanding region has a width in a range from 4.5 mm to 5.5 mm in the preset direction.

13. A display device, comprising: a plurality of light emitting elements and the driving substrate of claim 1 , wherein the plurality of light emitting elements are on a side of the first conductive pattern layer distal to the flexible substrate base;
each of the plurality of light emitting elements comprises a first pin and a second pin which are electrically coupled to corresponding first connection terminals of the plurality of first connection terminals, respectively.

14. The display device of claim 13 , further compr

Assignees

• Boe Technology Group Co Ltd

Inventors

• Lu Xinhong
• Zhang Fangzhen
• Yuan Guangcai
• Cao Zhanfeng
• Wang Jiushi
• Wang Ke
• Zhu Xiaoyan
• Qi Qi
• Zhou Jingshang
• Qiang Zhaohui
• Liang Zhiwei

Classifications

• H10W90/00

  Package configurations · CPC title

• H10D86/411

  characterised by materials, geometry or structure of the substrates · CPC title

• H10D86/451

  characterised by the compositions or shapes of the interlayer dielectrics · CPC title

• H10D86/021

  of multiple TFTs · CPC title

• H10D86/441 Primary

  Interconnections, e.g. scanning lines · CPC title