System and method for supplying power from a multi-cell battery to a single-cell power management system

Patent metadata

Field	Value
Publication number	US-11721992-B2
Application number	US-202016937377-A
Country	US
Kind code	B2
Filing date	Jul 23, 2020
Priority date	Jul 23, 2020
Publication date	Aug 8, 2023
Grant date	Aug 8, 2023

Abstract

Systems and methods for supplying power from a multi-cell battery to a single-cell power management integrated circuit. One implementation of the system includes a voltage converter circuit, a control circuit, and a signal buffer circuit. The voltage converter circuit is configured to scale a positive battery terminal voltage signal received from the multi-cell battery to generate a scaled voltage signal. The control circuit is configured to select one of the scaled voltage signal or a cell voltage signal received from the multi-cell battery. The control circuit is also configured to output a high-impedance single-cell power signal including the selected one of the scaled voltage signal or the cell voltage signal. The signal buffer circuit is configured to buffer the high-impedance single-cell power signal to generate a low-impedance single-cell power signal for a voltage sense pin of the single-cell power management integrated circuit.

First claim

We claim:

1. A system for supplying power from a multi-cell battery to a single-cell power management integrated circuit, the system comprising:
a first power terminal for receiving a positive battery terminal voltage signal from the multi-cell battery;
a second power terminal for receiving a cell voltage signal from the multi-cell battery;
a voltage converter circuit configured to scale the positive battery terminal voltage signal to generate a scaled voltage signal;
a control circuit configured to:
detect whether the multi-cell battery is a regulated multi-cell battery or an unregulated multi-cell battery based on a voltage at the second power terminal,
select one of the scaled voltage signal or the cell voltage signal based on the detection, and
output a high-impedance single-cell power signal including the selected one of the scaled voltage signal or the cell voltage signal;

a signal buffer circuit configured to buffer the high-impedance single-cell power signal to generate a low-impedance single-cell power signal; and
a third power terminal for sending the low-impedance single-cell power signal to a voltage sense pin of the single-cell power management integrated circuit.

2. The system of claim 1 , wherein the voltage converter circuit, the control circuit, and the signal buffer circuit are further configured to be enabled responsive to a device power control signal.

3. The system of claim 2 , wherein the control circuit includes a delay timer configured to generate an on-switch control signal for the single-cell power management integrated circuit a predetermined period of time after the control circuit is enabled by the device power control signal.

4. The system of claim 2 , wherein the system is further configured to receive the device power control signal from at least one selected from the group consisting of a rotary switch, a latched momentary button, and an external source.

5. The system of claim 1 , wherein the control circuit includes:
a comparator configured to select the one of the scaled voltage signal or the cell voltage signal by comparing the voltage at the second power terminal to a reference voltage, wherein the reference voltage is set based on a voltage level present at the second power terminal when the cell voltage signal is not applied, and
a power source selector configured to output the selected one of the scaled voltage signal or the cell voltage signal by selectively coupling the voltage converter circuit or the second power terminal to the signal buffer circuit.

6. The system of claim 5 , further comprising a signal conditioning circuit configured to scale the voltage at the second power terminal by a predetermined scaling factor before the comparator compares the voltage at the second power terminal to the reference voltage.

7. The system of claim 1 , further comprising a power regulator circuit configured to generate a low-current, low-power supply signal for one or more always-on power domains in the single-cell power management integrated circuit from the positive battery terminal voltage signal of the multi-cell battery.

8. The system of claim 1 , wherein the first power terminal is coupled to a B+ pin of the multi-cell battery, and wherein the second power terminal is coupled to a single wire pin of the multi-cell battery.

9. The system of claim 1 , wherein the signal buffer circuit includes a voltage follower or an emitter follower.

10. The system of claim 1 , wherein the voltage converter circuit includes a voltage divider, and wherein the signal buffer circuit includes an operational amplifier.

11. A method for supplying power from a multi-cell battery to a single-cell power management integrated circuit, the method comprising:
receiving a positive battery terminal voltage signal from the multi-cell battery at a first power terminal;
receiving a cell voltage signal from the multi-cell battery at a second power terminal;
scaling the positive battery terminal voltage signal with a voltage converter circuit to generate a scaled voltage signal;
detecting, with a control circuit, whether the multi-cell battery is a regulated multi-cell battery or an unregulated multi-cell battery based on a voltage at the second power terminal;
selecting, with the control circuit, one of the scaled voltage signal or the cell voltage signal based on the detection;
outputting, with the control circuit, a high-impedance single-cell power signal including the selected one of the scaled voltage signal or the cell voltage signal;
buffering the high-impedance single-cell power signal with a signal buffer circuit to generate a low-impedance single-cell power signal; and
sending the low-impedance single-cell power signal to a voltage sense pin of the single-cell power management integrated circuit from a third power terminal.

12. The method of claim 11 , further comprising enabling the voltage converter circuit, the control circuit, and the signal buffer circuit responsive to a device power control signal.

13. The method of claim 12 , further comprising generating, with a delay timer included in the control circuit, an on-switch control signal for the single-cell power management integrated circuit a predetermined period of time after the control circuit is enabled by the device power control signal.

14. The method of claim 12 , further comprising receiving the device power control signal from at least one selected from the group consisting of a rotary switch, a latched momentary button, and an external source.

15. The method of claim 11 , further comprising:
selecting the one of the scaled voltage signal or the cell voltage signal by comparing the voltage at the second power terminal to a reference voltage with a comparator included in the control circuit, wherein the reference voltage is set based on a voltage level present at the second power terminal when the cell voltage signal is not applied; and
outputting the selected one of the scaled voltage signal or the cell voltage signal as the high-impedance single-cell power signal by selectively coupling the voltage converter circuit or the second power terminal to the signal buffer circuit with a power source selector included in the control circuit.

16. The method of claim 15 , further comprising scaling the voltage at the second power terminal with a signal conditioning circuit prior to the comparator comparing the voltage at the second power terminal to the reference voltage.

17. The method of claim 11 , further comprising generating a low-current, low-power supply signal with a power regulator circuit for one or more always-on power domains in the single-cell power management integrated circuit from the positive battery terminal voltage signal of the multi-cell battery.

18. The method of claim 11 , further comprising:
receiving the positive battery terminal voltage signal at the first power terminal from a B+ pin of the multi-cell battery; and
receiving the cell voltage signal at the second power terminal from a single wire pin of the multi-cell battery.

19. The method of claim 11 , further comprising buffering the high-impedance single-cell power signal with a voltage follower or an emitter follower included in the signal buffer circuit to generate the low-impedance single-cell power signal.

20. The method of claim 11 , further comprising:
scaling the positive battery terminal voltage signal with a voltage divider included in the voltage converter circuit to generate the scaled voltage signal; and
buffering the high-impedan

Assignees

• Motorola Solutions Inc

Inventors

• Bartels Peter J
• Alfaro Javier
• Elliott Kevin D

Classifications

• H02J7/50

  acting upon multiple batteries simultaneously or sequentially · CPC title

• H02J7/80 Primary

  including monitoring or indicating arrangements · CPC title

• H02J2105/44

  Portable electronic devices · CPC title

• H02J7/855 Primary

  with circuits adapted for supplying loads from the battery · CPC title

• H02J7/0047 Primary

  Electricity · mapped topic