Hybrid drive circuit for variable speed induction motor system and methods of control

US11716040B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11716040-B2
Application numberUS-202117156013-A
CountryUS
Kind codeB2
Filing dateJan 22, 2021
Priority dateSep 15, 2015
Publication dateAug 1, 2023
Grant dateAug 1, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Controllers for controlling hybrid motor drive circuits configured to drive a motor are provided herein. A controller is configured to drive the motor using an inverter when a motor commanded frequency is not within a predetermined range of line input power frequencies, and couple line input power to an output of the inverter using a first switch device when the motor commanded frequency is within the predetermined range of line input power frequencies.

First claim

Opening claim text (preview).

What is claimed is: 1. A motor controller, said motor controller configured to: operate a switch device electrically coupled in parallel with a run capacitor of a first motor, the switch device configured to bypass the run capacitor when a first commanded motor frequency is not within a predetermined range of line input power frequencies; and modulate two phases of a first inverter to apply a first output voltage to the first motor that is substantially equivalent to line input voltage when the first commanded motor frequency is within the predetermined range of line input power frequencies. 2. The motor controller of claim 1 , further configured to estimate motor terminal voltages of the motor to minimize a phase difference of the two phases of the first inverter with the line input voltage. 3. The motor controller of claim 1 , further configured to measure motor terminal voltages of the motor to minimize a phase difference of the two phases of the first inverter with the line input voltage. 4. The motor controller of claim 1 , further configured to use a low-capacitance DC-link capacitor to maximize power factor of the first motor, the low-capacitance DC-link capacitor having a capacitance less than 100 μF. 5. The motor controller of claim 1 , further configured to modulate two phases of a second inverter to apply a second output voltage to a second motor that is substantially equivalent to line input voltage when a second commanded motor frequency is within the predetermined range of line input power frequencies. 6. The motor controller of claim 5 , further configured to use a high-capacitance DC-link capacitor to minimize voltage ripple on the second inverter of the second motor, the high-capacitance DC-link capacitor having a capacitance between 100 μF and 1000 μF. 7. The motor controller of claim 5 , wherein the first motor is configured to tum a compressor and the second motor is configured to tum a condenser fan. 8. The motor controller of claim 1 , further configured to receive, from a current sensor coupled to at least one of a positive DC-link rail or a negative DC-link rail of the motor controller, a fault signal indicating an excessive current present in at least one of ground or windings of the first motor. 9. The motor controller of claim 8 , further configured to disable the first inverter from supplying the first voltage output to the first motor in response to the fault signal. 10. A method for controlling a motor, said method comprising: operating, by a motor controller, a switch device electrically coupled in parallel with a run capacitor of a first motor, the switch device configured to bypass the run capacitor when a first commanded motor frequency is not within a predetermined range of line input power frequencies; and modulating, by the motor controller, two phases of a first inverter to apply a first output voltage to the first motor that is substantially equivalent to line input voltage when the first commanded motor frequency is within the predetermined range of line input power frequencies. 11. The method of claim 10 , further comprising estimating, by the motor controller, motor terminal voltages of the motor to minimize a phase difference of the two phases of the first inverter with the line input voltage. 12. The method of claim 10 , further comprising measuring, by the motor controller, motor terminal voltages of the motor to minimize a phase difference of the two phases of the first inverter with the line input voltage. 13. The method of claim 10 , further comprising using, by the motor controller, a low-capacitance DC-link capacitor to maximize power factor of the first motor, the low-capacitance DC-link capacitor having a capacitance less than 100 μF. 14. The method of claim 10 , further comprising modulating, by the motor controller, two phases of a second inverter to apply a second output voltage to a second motor that is substantially equivalent to line input voltage when a second commanded motor frequency is within the predetermined range of line input power frequencies. 15. The method of claim 14 , further comprising using, by the motor controller, a high-capacitance DC-link capacitor to minimize voltage ripple on the second inverter the second motor, the high-capacitance DC-link capacitor having a capacitance between 100 μF and 1000 μF. 16. The method of claim 10 , further comprising receiving, by the motor controller from a current sensor coupled to one of a positive DC-link rail or a negative DC-link rail of the motor controller, a fault signal indicating an excessive current present in at least one of ground or windings of the first motor. 17. The method of claim 16 , further comprising disabling, by the motor controller, the first inverter from supplying the first voltage output to the first motor in response to the fault signal. 18. A hybrid motor system comprising: a first motor comprising a run capacitor; and a motor controller configured to: operate a switch device coupled in parallel with said run capacitor, the switch device configured to bypass said run capacitor when a first commanded motor frequency is not within a predetermined range of line input power frequencies; and modulate two phases of a first inverter to apply a first output voltage to said first motor that is substantially equivalent to line input voltage when the first commanded motor frequency is within the predetermined range of line input power frequencies. 19. The hybrid motor system of claim 18 , wherein said motor controller is further configured to use a low-capacitance DC-link capacitor to maximize power factor of the first motor, the low-capacitance DC-link capacitor having a capacitance less than 100 μF. 20. The hybrid motor system of claim 18 , further comprising a second motor, wherein said motor controller is further configured to modulate two phases of a second inverter to apply a second output voltage to said second motor that is substantially equivalent to line input voltage when a second commanded motor frequency is within the predetermined range of line input power frequencies.

Assignees

Inventors

Classifications

  • H02P27/06Primary

    using DC to AC converters or inverters (H02P27/05 takes precedence) · CPC title

  • Security devices, e.g. correct phase sequencing · CPC title

  • by progressive increase of frequency of supply to primary circuit of motor · CPC title

  • H02P1/426Primary

    by using a specially adapted frequency converter · CPC title

  • by phase-splitting with a capacitor · CPC title

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What does patent US11716040B2 cover?
Controllers for controlling hybrid motor drive circuits configured to drive a motor are provided herein. A controller is configured to drive the motor using an inverter when a motor commanded frequency is not within a predetermined range of line input power frequencies, and couple line input power to an output of the inverter using a first switch device when the motor commanded frequency is wit…
Who is the assignee on this patent?
Regal Beloit America Inc
What technology area does this patent fall under?
Primary CPC classification H02P27/06. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).