Multi-layer ceramic capacitor

US11715593B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11715593-B2
Application numberUS-202117145688-A
CountryUS
Kind codeB2
Filing dateJan 11, 2021
Priority dateApr 11, 2017
Publication dateAug 1, 2023
Grant dateAug 1, 2023

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A multi-layer ceramic capacitor includes a multi-layer unit and a side margin. The multi-layer unit includes ceramic layers laminated in a first direction, internal electrodes disposed between the ceramic layers, a main surface oriented in the first direction, a surface layer portion in a range from the main surface to a predetermined depth, and a center portion adjacent to the surface layer portion in the first direction. The side margin covers the multi-layer unit from a second direction orthogonal to the first direction. The ceramic layers have an average dimension in the first direction that is 0.4 μm or less. Each of the internal electrodes includes an oxidized region adjacent to the side margin. The oxidized region in the surface layer portion has a dimension in the second direction that is equal to or more than two times the average dimension of the ceramic layers in the first direction.

First claim

Opening claim text (preview).

What is claimed is: 1. A multi-layer ceramic capacitor, comprising: a multi-layer unit that includes ceramic layers laminated in a first direction, internal electrodes disposed between the ceramic layers, a main surface facing the first direction, a side surface facing a second direction orthogonal to the first direction, a surface layer portion in a range from the main surface to a predetermined depth, the surface layer portion having a cover portion including the main surface, a first internal electrode in an outermost layer adjacent to the cover portion and included in the internal electrodes, and a second internal electrode separate from the first internal electrode and included in the internal electrodes, and a center portion adjacent to the surface layer portion in the first direction; and a side margin that covers the side surface of the multi-layer unit from the second direction, such that all internal electrodes are covered from the second direction by the side margin, each of the internal electrodes including an oxidized region that is adjacent to the side margin, the oxidized region of the second internal electrode in the surface layer portion having a dimension in the second direction that is equal to or more than two times the average dimension of the ceramic layers in the first direction, and the oxidized region of each of the internal electrodes in the center portion having a dimension in the second direction that is less than two times the average dimension of the ceramic layers in the first direction. 2. The multi-layer ceramic capacitor according to claim 1 , wherein the predetermined depth is defined to be 10% of a dimension of the multi-layer unit in the first direction. 3. The multi-layer ceramic capacitor according to claim 1 , wherein the internal electrodes include nickel as a main component. 4. A multi-layer ceramic capacitor, comprising: a multi-layer unit that includes ceramic layers laminated in a first direction, internal electrodes disposed between the ceramic layers, a main surface facing the first direction, a side surface facing a second direction orthogonal to the first direction, a surface layer portion in a range from the main surface to a predetermined depth, and a center portion adjacent to the surface layer portion in the first direction; and a side margin that covers the side surface of the multi-layer unit from the second direction, such that all internal electrodes are covered from the second direction by the side margin, the ceramic layers having an average dimension in the first direction that is 4 μm or less, each of the internal electrodes including an oxidized region that is adjacent to the side margin, the oxidized region in the surface layer portion having a dimension in the second direction that is equal to or more than two times the average dimension of the ceramic layers in the first direction, the oxidized region in the center portion having a dimension in the second direction that is less than two times the average dimension of the ceramic layers in the first direction, and wherein the oxidized region in the surface layer portion has a dimension in the second direction that is equal to or less than four times the average dimension of the ceramic layers in the first direction. 5. The multi-layer ceramic capacitor according to claim 4 , wherein the predetermined depth is defined to be 10% of a dimension of the multi-layer unit in the first direction. 6. The multi-layer ceramic capacitor according to claim 4 , wherein the internal electrodes include nickel as a main component.

Assignees

Inventors

Classifications

  • H01G2/20Primary

    Arrangements for preventing discharge from edges of electrodes · CPC title

  • Selection of materials · CPC title

  • Fried electrodes · CPC title

  • Ceramic dielectrics {(H01G4/085 takes precedence)} · CPC title

  • Housing; Encapsulation · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11715593B2 cover?
A multi-layer ceramic capacitor includes a multi-layer unit and a side margin. The multi-layer unit includes ceramic layers laminated in a first direction, internal electrodes disposed between the ceramic layers, a main surface oriented in the first direction, a surface layer portion in a range from the main surface to a predetermined depth, and a center portion adjacent to the surface layer po…
Who is the assignee on this patent?
Taiyo Yuden Kk
What technology area does this patent fall under?
Primary CPC classification H01G2/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).