Stuck-at fault mitigation method for ReRAM-based deep learning accelerators

US11714727B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11714727-B2
Application numberUS-202217581327-A
CountryUS
Kind codeB2
Filing dateJan 21, 2022
Priority dateJan 29, 2021
Publication dateAug 1, 2023
Grant dateAug 1, 2023

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Abstract

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A stuck-at fault mitigation method for resistive random access memory (ReRAM)-based deep learning accelerators, includes: confirming a distorted output value (Y0) due to a stuck-at fault (SAF) by using a correction data set in a pre-trained deep learning network, by means of ReRAM-based deep learning accelerator hardware; updating an average (μ) and a standard deviation (σ) of a batch normalization (BN) layer by using the distorted output value (Y0), by means of the ReRAM-based deep learning accelerator hardware; folding the batch normalization (BN) layer in which the average (μ) and the standard deviation (σ) are updated into a convolution layer or a fully-connected layer, by means of the ReRAM-based deep learning accelerator hardware; and deriving a normal output value (Y1) by using the deep learning network in which the batch normalization (BN) layer is folded, by means of the ReRAM-based deep learning accelerator hardware.

First claim

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What is claimed is: 1. A stuck-at fault mitigation method for resistive random access memory (ReRAM)-based deep learning accelerators comprising: a stuck-at fault confirming step of confirming a distorted output value (Y0) due to a stuck-at fault (SAF) by using a correction data set in a pre-trained deep learning network, by means of ReRAM-based deep learning accelerator hardware; an updating step of updating an average (μ) and a standard deviation (σ) of a batch normalization (BN) layer by using the distorted output value (Y0), by means of the ReRAM-based deep learning accelerator hardware; a folding step of folding the batch normalization (BN) layer in which the average (μ) and the standard deviation (σ) are updated into a convolution layer or a fully-connected layer, by means of the ReRAM-based deep learning accelerator hardware; and a deriving step of deriving a normal output value (Y1) by using the deep learning network in which the batch normalization (BN) layer is folded, by means of the ReRAM-based deep learning accelerator hardware. 2. The stuck-at fault mitigation method for the ReRAM-based deep learning accelerators of claim 1 , wherein the deep learning network derives at least one of the distorted output value (Y0) and the normal output value (Y1) by using y = γ ⁡ ( x - μ σ 2 - ε ) + β , based on affine transformation, wherein, y is an output value, x is an input value, μ and σ are the average and the standard deviation as forward parameters, β and γ are a bias value and an affine transformation weight as backward parameters, and ε is a constant. 3. The stuck-at fault mitigation method for the ReRAM-based deep learning accelerators of claim 2 , wherein in the updating step, the updating for parameters other than the average (μ) and the standard deviation (σ) of the batch normalization (BN) layer does not occur. 4. The stuck-at fault mitigation method for the ReRAM-based deep learning accelerators of claim 1 , wherein in the updating step, when there is no batch normalization (BN) layer in the deep learning network, the batch normalization (BN) layer is added to one side of the convolution layer or the fully-connected layer so that the stuck-at fault is mitigated, and in the folding step, the batch normalization (BN) layer is folded into the convolution layer or the fully-connected layer so that the deriving step is simplified.

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Classifications

  • Convolutional networks [CNN, ConvNet] · CPC title

  • Masking faults in memories by using spares or by reconfiguring · CPC title

  • with adaption or trimming of parameters · CPC title

  • using elements simulating biological cells, e.g. neuron · CPC title

  • Backpropagation, e.g. using gradient descent · CPC title

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What does patent US11714727B2 cover?
A stuck-at fault mitigation method for resistive random access memory (ReRAM)-based deep learning accelerators, includes: confirming a distorted output value (Y0) due to a stuck-at fault (SAF) by using a correction data set in a pre-trained deep learning network, by means of ReRAM-based deep learning accelerator hardware; updating an average (μ) and a standard deviation (σ) of a batch normaliza…
Who is the assignee on this patent?
Unist Academy Industry Res Corporation, Univ California, Univ King Abdullah Sci & Tech
What technology area does this patent fall under?
Primary CPC classification G06N3/065. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).