Error rate measuring apparatus and error distribution display method

Patent metadata

Field	Value
Publication number	US-11714130-B2
Application number	US-202117552608-A
Country	US
Kind code	B2
Filing date	Dec 16, 2021
Priority date	Mar 3, 2021
Publication date	Aug 1, 2023
Grant date	Aug 1, 2023

Abstract

An error rate measuring apparatus that measures whether or not an FEC operation of the device under test is possible based on a comparison result of the signal received from the device under test and a test signal includes an operation unit that sets a codeword length and an FEC symbol length of the FEC corresponding to a communication standard of the device under test, a data comparison unit that compares bit string data obtained by converting the signal received from the device under test with error data to detect an FEC symbol error of each FEC symbol length, a display unit that associates the bit string data of the FEC symbol length as one point with one unit region of a display region and performs color-coding display depending on presence or absence of occurrence of the FEC symbol error by each FEC symbol length.

First claim

What is claimed is:

1. An error rate measuring apparatus that inputs a Non Return to Zero (NRZ) signal of a known pattern as a test signal to a device under test, receives a signal from the device under test with the input of the test signal, and measures whether or not a forward error correction (FEC) operation of the device under test is possible based on a comparison result of the signal received from the device under test and the test signal, the error rate measuring apparatus comprising:
a processor configured to:
set a codeword length and an FEC symbol length of the FEC corresponding to a communication standard of the device under test; and
compare bit string data obtained by converting the signal received from the device under test with error data to detect an FEC symbol error of each FEC symbol length; and

a display configured to, based on a detection result of the FEC symbol error, associate the bit string data of the FEC symbol length as one point with one unit region of a display region of the display, and perform color-coding display on the display depending on presence or absence of occurrence of the FEC symbol error by each FEC symbol length.

2. The error rate measuring apparatus according to claim 1 , wherein the color-coding display color-codes and displays a location where the FEC symbol error occurs by each FEC symbol length and a location where the FEC symbol error does not occur by each FEC symbol length.

3. An error rate measuring apparatus that inputs a Pulse Amplitude Modulation 4 (PAM4) signal of a known pattern as a test signal to a device under test, receives a signal from the device under test with the input of the test signal, and measures whether or not a forward error correction (FEC) operation of the device under test is possible based on a comparison result of the signal received from the device under test and the test signal, the error rate measuring apparatus comprising:
a processor configured to:
that set a codeword length and an FEC symbol length of the FEC corresponding to a communication standard of the device under test;
divide symbol string data obtained by converting the signal received from the device under test into most significant bit string data and least significant bit string data; and
compare each of the most significant bit string data and the least significant bit string data divided by the data division means with error data to detect an FEC symbol error of each of the most significant bit string data and the least significant bit string data by each FEC symbol length; and

a display configured to, based on a detection result of the FEC symbol error, associate the most significant bit string data and the least significant bit string data of the FEC symbol length as one point with one unit region of a display region of the display and perform color-coding display on the display depending on presence or absence of occurrence of the FEC symbol error by each FEC symbol length.

4. The error rate measuring apparatus according to claim 3 , wherein the color-coding display color-codes and displays a location where the FEC symbol error occurs in the most significant bit string data alone, a location where the FEC symbol error occurs in the least significant bit string data alone, a location where the FEC symbol error occurs in both the most significant bit string data and the least significant bit string data, and a location where the FEC symbol error does not occur.

5. An error distribution display method for an error rate measuring apparatus that inputs a Non Return to Zero (NRZ) signal of a known pattern as a test signal to a device under test, receives a signal from the device under test with the input of the test signal, and measures whether or not a forward error correction (FEC) operation of the device under test is possible based on a comparison result of the signal received from the device under test and the test signal, the error distribution display method comprising:
a step of setting a codeword length and an FEC symbol length of the FEC corresponding to a communication standard of the device under test;
a step of comparing bit string data obtained by converting the signal received from the device under test with error data to detect an FEC symbol error of each FEC symbol length; and
a step of, based on a detection result of the FEC symbol error, associating the bit string data of the FEC symbol length as one point with one unit region of a display region of a display and performing color-coding display on the display depending on presence or absence of occurrence of the FEC symbol error by each FEC symbol length.

6. The error distribution display method according to claim 5 , wherein the color-coding display color-codes and displays a location where the FEC symbol error occurs by each FEC symbol length and a location where the FEC symbol error does not occur by each FEC symbol length.

7. An error distribution display method for an error rate measuring apparatus that inputs a Pulse Amplitude Modulation 4 (PAM4) signal of a known pattern as a test signal to a device under test, receives a signal from the device under test with the input of the test signal, and measures whether or not a forward error correction (FEC) operation of the device under test is possible based on a comparison result of the signal received from the device under test and the test signal, the error distribution display method comprising:
a step of setting a codeword length and an FEC symbol length of the FEC corresponding to a communication standard of the device under test;
a step of dividing symbol string data obtained by converting the signal received from the device under test into most significant bit string data and least significant bit string data,
a step of comparing each of the most significant bit string data and the least significant bit string data with error data to detect an FEC symbol error of each of the most significant bit string data and the least significant bit string data by each FEC symbol length; and
a step of, based on a detection result of the FEC symbol error, associating the most significant bit string data and the least significant bit string data of the FEC symbol length as one point with one unit region of a display region of a display and performing color-coding display depending on presence or absence of occurrence of the FEC symbol error by each FEC symbol length.

8. The error distribution display method according to claim 7 , wherein the color-coding display color-codes and displays a location where the FEC symbol error occurs in the most significant bit string data alone, a location where the FEC symbol error occurs in the least significant bit string data alone, a location where the FEC symbol error occurs in both the most significant bit string data and the least significant bit string data, and a location where the FEC symbol error does not occur.

Assignees

• Anritsu Corp

Inventors

• Onuma Hiroyuki

Classifications

• G01R31/3177 Primary

  Testing of logic operation, e.g. by logic analysers · CPC title

• G01R31/31703

  Comparison aspects, e.g. signature analysis, comparators (concerning scan tests G01R31/318566; concerning testers G01R31/3193) · CPC title

• G06F11/10

  Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's · CPC title

• H04L25/4917 Primary

  using multilevel codes · CPC title

• G01R31/3171

  BER [Bit Error Rate] test · CPC title