Multilayer electronic component

US11710600B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11710600-B2
Application numberUS-202016987684-A
CountryUS
Kind codeB2
Filing dateAug 7, 2020
Priority dateAug 28, 2019
Publication dateJul 25, 2023
Grant dateJul 25, 2023

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

A multilayer electronic component that includes a stacked body having therein a plurality of dielectric layers including a CZ-based perovskite phase and an element M1, a plurality of internal electrode layers including Cu, and an interface layer including the element M1 in at least a portion of an interface with the plurality of internal electrode layers. Element M1 is an element that has a binding energy between CZ and Cu via the element M1 of less than or equal to −9.8 eV by first-principles calculation using a pseudopotential method. When amounts of elements included in the dielectric layers are expressed as parts by mol, a ratio m1 of an amount of the element M1 to an amount of the Zr in the interface layer is 0.03≤m1≤0.25.

First claim

Opening claim text (preview).

What is claimed is: 1. A multilayer electronic component comprising: a stacked body having therein a plurality of dielectric layers including a CaZrO 3 -based perovskite phase and an element M1, a plurality of internal electrode layers including Cu, and an interface layer including the element M1 in a solid state dissolved form in a in a vicinity of grain boundaries of crystal grains of the CaZrO 3 -based perovskite phase in contact with the plurality of internal electrode layers, wherein the element M1 is an element having a binding energy between CaZrO 3 and Cu via the element M1 of less than or equal to −9.8 eV by first-principles calculation using a pseudopotential method, and when amounts of elements included in the plurality of dielectric layers are expressed as parts by mol, a ratio m1 of an amount of the element M1 to an amount of the Zr in the interface layer is 0.03≤m1≤0.25, and the interface layer contains more of the element M1 than the plurality of dielectric layers. 2. The multilayer electronic component according to claim 1 , wherein the element M1 is at least one element selected from Al, Si, Mn, Ti and V. 3. The multilayer electronic component according to claim 2 , wherein the plurality of dielectric layers further include a secondary phase including the element M1, and the secondary phase is at least partially included in the interface layer. 4. The multilayer electronic component according to claim 1 , wherein the plurality of dielectric layers further include a secondary phase including the element M1, and the secondary phase is at least partially included in the interface layer. 5. The multilayer electronic component according to claim 1 , wherein the binding energy between the CaZrO 3 and the Cu via the element M1 is less than −12.0 eV by the first-principles calculation using the pseudopotential method. 6. The multilayer electronic component according to claim 5 , wherein the element M1 is selected from Mn, Ti and V. 7. The multilayer electronic component according to claim 6 , wherein the plurality of dielectric layers further include a secondary phase including the element M1, and the secondary phase is at least partially included in the interface layer. 8. The multilayer electronic component according to claim 5 , wherein the plurality of dielectric layers further include a secondary phase including the element M1, and the secondary phase is at least partially included in the interface layer.

Assignees

Inventors

Classifications

  • H01G4/30Primary

    Stacked capacitors (H01G4/33 takes precedence) · CPC title

  • based on calcium oxide · CPC title

  • Selection of materials · CPC title

  • Form of non-self-supporting electrodes · CPC title

  • H01G4/1236Primary

    based on zirconium oxides or zirconates (H01G4/1263 takes precedence) · CPC title

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What does patent US11710600B2 cover?
A multilayer electronic component that includes a stacked body having therein a plurality of dielectric layers including a CZ-based perovskite phase and an element M1, a plurality of internal electrode layers including Cu, and an interface layer including the element M1 in at least a portion of an interface with the plurality of internal electrode layers. Element M1 is an element that has a bin…
Who is the assignee on this patent?
Murata Manufacturing Co
What technology area does this patent fall under?
Primary CPC classification H01G4/30. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 25 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).