Display system

Patent metadata

Field	Value
Publication number	US-11710468-B2
Application number	US-202117238023-A
Country	US
Kind code	B2
Filing date	Apr 22, 2021
Priority date	Dec 28, 2017
Publication date	Jul 25, 2023
Grant date	Jul 25, 2023

Abstract

Systems and method for image generation in a gaze tracking display. A gaze tracking display system includes a graphics processor and display circuitry. The graphics processor is configured to perform foveated rendering of image data, and to output foveated image data. The display circuitry is coupled to the graphics processor. The display circuitry includes a display device and a display controller. The display device is configured to produce a viewable image. The display controller is configured to drive the display device. The display controller includes foveated data reconstruction circuitry configured to produce an image at a resolution of the display device based on the foveated image data received from the graphics processor.

First claim

What is claimed is:

1. A processor configured to:
perform foveated rendering of image data to produce foveated image data;
produce a foveation header for the foveated image data, the foveation header comprising a spatial replication field for a block of the foveated image data; and
output the foveated image data with the foveation header.

2. The processor of claim 1 , wherein the spatial replication field indicates a spatial decimation pattern applied in the block and whether the spatial decimation pattern is to be applied to an adjacent block.

3. The processor of claim 1 , wherein the foveation header further comprises a temporal replication field indicating whether the block is to be written to a frame buffer.

4. The processor of claim 1 , wherein the foveation header further comprises a pixel format field.

5. The processor of claim 1 , wherein outputting the foveation header comprises transmitting the foveation header in a vertical blanking time.

6. The processor of claim 1 , wherein outputting the foveated image data with the foveation header comprises transmitting the foveated image data with the foveation header over a display serial interface.

7. The processor of claim 1 , wherein performing foveated rendering of the image data comprises producing the foveated image data having:
a first resolution a first distance from a focal point of a gaze; and
a second resolution a second distance from the focal point of the gaze, the first distance less than the second distance and the first resolution higher than the second resolution.

8. The processor of claim 1 , wherein the foveated image data is a quarter or less an amount of data than the image data.

9. A display controller configured to:
obtain foveated image data;
obtain a foveation header; and
reconstruct the foveated image data responsive to the foveation header to produce reconstructed image data.

10. The display controller of claim 9 , wherein the foveated image data is in YCrCb format, and wherein the display controller is further configured to:
convert the foveated image data to produce the foveated image data in an RGB format.

11. The display controller of claim 9 , wherein reconstructing the foveated image data comprises performing spatial replication of the foveated image data.

12. The display controller of claim 9 , wherein reconstructing the foveated image data comprises performing temporal replication of the foveated image data.

13. The display controller of claim 10 , wherein converting the foveated image data comprises using a look-up table.

14. The display controller of claim 10 , wherein the display controller is further configured to use the foveation header associated with the foveated image data to reconstruct the foveated image data in the RGB format.

15. The display controller of claim 9 , further comprising a frame buffer configured to double buffer the foveated image data.

16. The display controller of claim 9 , further configured to transmit the reconstructed image data to a display device multiple times.

17. A display controller comprising:
a frame buffer having a buffer input and a buffer output;
foveated image data reconstruction circuitry coupled to the buffer output, the foveated image data reconstruction circuitry comprising a pixel spatial replicator;
up-conversion circuitry coupled to the foveated image data reconstruction circuitry; and
display interface circuitry coupled to the up-conversion circuitry.

18. The display controller of claim 17 , wherein the foveated image data reconstructions circuitry further comprises:
a replication buffer coupled to the pixel spatial replicator;
color space conversion circuitry coupled to the replication buffer and to the frame buffer;
foveation map memory coupled to the buffer output and to the replication buffer; and
replication control coupled to the pixel spatial replicator and to the foveation map memory.

19. The display controller of claim 17 , wherein the pixel spatial replicator comprises:
flip-flops in a column buffer, the flip-flops configured to store pixel data of a display column; and
multiplexers coupled to the flip-flops, the multiplexers configured to route pixel values to the flip-flops.

Assignees

• Texas Instruments Inc

Inventors

• Kempf Jeff
• Morgan Dan

Classifications

• G09G2350/00

  Solving problems of bandwidth in display systems · CPC title

• G09G2320/0242

  Compensation of deficiencies in the appearance of colours · CPC title

• G09G2354/00

  Aspects of interface with display user · CPC title

• G09G3/2051

  with use of a spatial dither pattern · CPC title

• G09G2360/18

  Use of a frame buffer in a display terminal, inclusive of the display panel · CPC title