Display panel having a plurality of connection lines in third area being electrically connected to plurality of pixels of first area

Patent metadata

Field	Value
Publication number	US-11678535-B2
Application number	US-202017115931-A
Country	US
Kind code	B2
Filing date	Dec 9, 2020
Priority date	Dec 18, 2019
Publication date	Jun 13, 2023
Grant date	Jun 13, 2023

Abstract

A display panel includes a substrate including a first area including a transmission area, a second area, and a third area, the second area and the third area being adjacent to the first area; a first pixel group and a second pixel group each disposed in the first area, the transmission area being disposed between the first pixel group and the second pixel group; first connection lines extending in a first direction and electrically connected to first pixels of the first pixel group; second connection lines extending in the first direction and electrically connected to second pixels of the second pixel group; and third connection lines extending in a second direction and disposed in the third area, the third connection lines being electrically connected to the first connection lines and the second connection lines.

First claim

What is claimed is:

1. A display panel comprising:
a substrate including a first area including a transmission area, a second area, and a third area, the second area and the third area being adjacent to the first area;
a first pixel group and a second pixel group each disposed in the first area, the transmission area being disposed between the first pixel group and the second pixel group;
a plurality of first connection lines extending in a first direction and electrically connected to a plurality of first pixels of the first pixel group;
a plurality of second connection lines extending in the first direction and electrically connected to a plurality of second pixels of the second pixel group; and
a plurality of third connection lines extending in a second direction and disposed in the third area, the plurality of third connection lines being electrically connected to the plurality of first connection lines and the plurality of second connection lines,
wherein the second direction intersects the first direction.

2. The display panel of claim 1 , further comprising a plurality of wirings extending in the second direction in the second area,
wherein the plurality of wirings are electrically connected to the first pixel group and disconnected between the first pixel group and the second pixel group.

3. The display panel of claim 2 , wherein the plurality of wirings include a data line supplying a data signal.

4. The display panel of claim 3 , wherein the plurality of wirings and the plurality of third connection lines are disposed on a same layer.

5. The display panel of claim 1 , wherein the plurality of first connection lines and the plurality of second connection lines are disposed on a same layer.

6. The display panel of claim 1 , further comprising a plurality of auxiliary wirings extending in the second direction and electrically connected to the plurality of second pixels.

7. The display panel of claim 6 , wherein the plurality of second connection lines are electrically connected to the plurality of auxiliary wirings.

8. The display panel of claim 1 , further comprising a first metal layer disposed in the first area,
wherein the first metal layer overlaps the first pixel group and the plurality of first connection lines.

9. The display panel of claim 8 , further comprising a second metal layer disposed in the first area, the second metal layer being apart from the first metal layer,
wherein the second metal layer overlaps the second pixel group and the plurality of second connection lines.

10. The display panel of claim 9 , wherein the first metal layer and the second metal layer receive a constant voltage from a conductive line.

11. The display panel of claim 9 , wherein each of the plurality of first pixels and the plurality of second pixels includes a pixel circuit including a thin-film transistor,
the thin-film transistor includes a semiconductor layer and a gate electrode overlapping at least a portion of the semiconductor layer, and
the first metal layer and the second metal layer are disposed between the substrate and the semiconductor layer.

12. The display panel of claim 1 , wherein the third area includes a non-display area surrounding the second area.

13. The display panel of claim 1 , wherein the third area surrounds at least a portion of the first area and is disposed between the first area and the second area.

14. The display panel of claim 1 , further comprising:
a first conductive layer disposed over the substrate; and
a second conductive layer disposed over the first conductive layer, wherein
an insulating layer is disposed between the first conductive layer and the second conductive layer,
the plurality of third connection lines and the first conductive layer include a same material, and
the plurality of first connection lines and the plurality of second connection lines and the second conductive layer include a same material.

15. The display panel of claim 1 , wherein
each of the plurality of first pixels and the plurality of second pixels includes:
a display element and
a pixel circuit including a thin-film transistor,

the thin-film transistor includes:
a semiconductor layer;
a gate electrode overlapping at least a portion of the semiconductor layer; and
an electrode layer electrically connected to the semiconductor layer, and

the plurality of third connection lines and the electrode layer include a same material.

16. The display panel of claim 15 , wherein
each of the plurality of first pixels and the plurality of second pixels includes a contact metal layer disposed between the display element and the thin-film transistor and electrically connecting the display element to the thin-film transistor, and
the plurality of first connection lines and the plurality of second connection lines and the contact metal layer include a same material.

17. The display panel of claim 1 , wherein the first area is at least partially surrounded by the second area.

18. The display panel of claim 1 , wherein a resolution of the first area is lower than a resolution of the second area.

19. A display device comprising:
a display panel including a substrate that includes a first area including a transmission area, a second area, and a third area, and the second area and the third area being disposed adjacent to the first area; and
a component arranged to correspond to the first area of the display panel,
wherein the display panel includes:
a first pixel group and a second pixel group each disposed in the first area, the transmission area being between the first pixel group and the second pixel group;
a plurality of first connection lines extending in a first direction and electrically connected to a plurality of first pixels of the first pixel group;
a plurality of second connection lines extending in the first direction and electrically connected to a plurality of second pixels of the second pixel group; and
a plurality of third connection lines extending in a second direction and disposed in the third area, the plurality of third connection lines being electrically connected to the plurality of first connection lines and the plurality of second connection lines, the second direction intersects the first direction.

20. The display device of claim 19 , wherein the component includes an imaging element.

Assignees

• Samsung Display Co Ltd

Inventors

• SHIM Junghoon
• Kwak Wonkyu
• Kim Sunghwan

Classifications

• H10K59/131 Primary

  Interconnections, e.g. wiring lines or terminals · CPC title

• H10K59/122 Primary

  Pixel-defining structures or layers, e.g. banks · CPC title

• H10K59/121 Primary

  characterised by the geometry or disposition of pixel elements · CPC title

• G09G3/3233

  with pixel circuitry controlling the current through the light-emitting element · CPC title

• H10K59/60

  OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes · CPC title