System and method for multi-node communication

Patent metadata

Field	Value
Publication number	US-11675719-B2
Application number	US-202117240240-A
Country	US
Kind code	B2
Filing date	Apr 26, 2021
Priority date	Apr 26, 2021
Publication date	Jun 13, 2023
Grant date	Jun 13, 2023

Abstract

A method, computer program product, and computing system for coupling a multi-host remote direct memory access (RDMA) card to at least a pair of central processing units (CPUs). One or more signals may be routed, via the multi-host RDMA card, between the at least a pair of CPUs.

First claim

What is claimed is:

1. A computer-implemented method, executed on a computing device, comprising:
coupling a single multi-host remote direct memory access (RDMA) card to at least a pair of central processing units (CPUs);
representing to each CPU, via the single multi-host RDMA card, every other CPU of the at least a pair of CPUs as an endpoint; and
routing, via the single multi-host RDMA card, one or more signals between the at least a pair of CPUs.

2. The computer-implemented method of claim 1 , wherein coupling the single multi-host RDMA card to the at least a pair of CPUs includes:
coupling each CPU of the at least a pair of CPUs to a midplane; and
coupling the single multi-host RDMA card to the midplane.

3. The computer-implemented method of claim 2 , wherein the midplane is configured to be positioned on a storage drive-side of an information technology (IT) rack.

4. The computer-implemented method of claim 1 , wherein a first CPU of the at least a pair of CPUs is positioned within a first storage processor and a second CPU of the at least a pair of CPUs is positioned within a second storage processor.

5. The computer-implemented method of claim 4 , further comprising:
coupling a second multi-host RDMA card to a third CPU positioned within the first storage processor and a fourth CPU positioned within the second storage processor; and
routing, via the second multi-host RDMA card, one or more signals between the third CPU and the fourth CPU.

6. The computer-implemented method of claim 1 , wherein the single multi-host RDMA card is configured to provide Ethernet over PCIe connectivity between the at least a pair of CPUs.

7. The computer-implemented method of claim 1 , wherein routing the one or more signals between the at least a pair of CPUs includes mirroring data between the at least a pair of CPUs.

8. A computer program product residing on a non-transitory computer readable medium having a plurality of instructions stored thereon which, when executed by a processor, cause the processor to perform operations comprising:
coupling a single multi-host remote direct memory access (RDMA) card to at least a pair of central processing units (CPUs);
representing to each CPU, via the single multi-host RDMA card, every other CPU of the at least a pair of CPUs as an endpoint; and
routing, via the single multi-host RDMA card, one or more signals between the at least a pair of CPUs.

9. The computer program product of claim 8 , wherein coupling the single multi-host RDMA card to the at least a pair of CPUs includes:
coupling each CPU of the at least a pair of CPUs to a midplane; and
coupling the single multi-host RDMA card to the midplane.

10. The computer program product of claim 9 , wherein the midplane is configured to be positioned on a storage drive-side of an information technology (IT) rack.

11. The computer program product of claim 8 , wherein a first CPU of the at least a pair of CPUs is positioned within a first storage processor and a second CPU of the at least a pair of CPUs is positioned within a second storage processor.

12. The computer program product of claim 11 , the operations further comprising:
coupling a second multi-host RDMA card to a third CPU positioned within the first storage processor and a fourth CPU positioned within the second storage processor; and
routing, via the second multi-host RDMA card, one or more signals between the third CPU and the fourth CPU.

13. The computer program product of claim 8 , wherein the single multi-host RDMA card is configured to provide Ethernet over PCIe connectivity between the at least a pair of CPUs.

14. The computer program product of claim 8 , wherein routing the one or more signals between the at least a pair of CPUs includes mirroring data between the at least a pair of CPUs.

15. A computing system comprising:
a memory; and
a processor configured to couple a single multi-host remote direct memory access (RDMA) card to at least a pair of central processing units (CPUs), wherein the processor is further configured to represent to each CPU, via the single multi-host RDMA card, every other CPU of the at least a pair of CPUs as an endpoint; and wherein the processor is further configured to route, via the single multi-host RDMA card, one or more signals between the at least a pair of CPUs.

16. The computing system of claim 15 , wherein coupling the single multi-host RDMA card to the at least a pair of CPUs includes:
coupling each CPU of the at least a pair of CPUs to a midplane; and
coupling the single multi-host RDMA card to the midplane.

17. The computing system of claim 15 , wherein the midplane is configured to be positioned on a storage drive-side of an information technology (IT) rack.

18. The computing system of claim 15 , wherein a first CPU of the at least a pair of CPUs is positioned within a first storage processor and a second CPU of the at least a pair of CPUs is positioned within a second storage processor.

19. The computing system of claim 18 , wherein the processor is further configured to:
couple a second multi-host RDMA card to a third CPU positioned within the first storage processor and a fourth CPU positioned within the second storage processor; and
route, via the second multi-host RDMA card, one or more signals between the third CPU and the fourth CPU.

20. The computing system of claim 15 , wherein the single multi-host RDMA card is configured to provide Ethernet over PCIe connectivity between the at least a pair of CPUs.

Assignees

• Emc Ip Holding Co Llc

Inventors

• Hadav Aric
• Yu Xiang
• Hu Sandburg
• Zhang Kunzheng

Classifications

• G06F13/28 Primary

  using burst mode transfer, e.g. direct memory access {DMA}, cycle steal (G06F13/32 takes precedence) · CPC title

• G06F2213/28

  DMA · CPC title