Logical to virtual and virtual to physical translation in storage class memory

Patent metadata

Field	Value
Publication number	US-11675707-B2
Application number	US-202117214120-A
Country	US
Kind code	B2
Filing date	Mar 26, 2021
Priority date	Jan 7, 2020
Publication date	Jun 13, 2023
Grant date	Jun 13, 2023

Abstract

A memory system and method for storing data in one or more storage chips includes: one or more memory cards each having a plurality of storage chips, and each chip having a plurality of dies having a plurality of memory cells; a memory controller comprising a translation module, the translation module further comprising: a logical to virtual translation table (LVT) having a plurality of entries, each entry in the LVT configured to map a logical address to a virtual block address (VBA), where the VBA corresponds to a group of the memory cells on the one or more memory cards, wherein each entry in the LVT further includes a write wear level count to track the number of writing operations to the VBA, and a read wear level count to track the number of read operations for the VBA mapped to that LVT entry.

First claim

What is claimed is:

1. A system for reading data from one or more memory cards, each memory card having a plurality of storage chips, and each storage chip having a plurality of dies having a plurality of memory cells, the system comprising:
one or more programmable readable storage media; and
programming instructions stored on the one or more programmable readable storage media for execution by at least one processor, the programming instructions when executed by the at least one processor configure the system to:
issue a request for data located on the one or more memory cards;
look up a logical address for the requested data in a logical to virtual translation table (LVT) having a plurality of entries, each entry in the LVT mapping a logical address to a virtual block address (VBA), where the VBA corresponds to a group of memory cells in the one or more memory cards;
in response to locating the logical address of the requested data in an entry in the LVT, check that LVT entry to determine whether the data is located in a Drift Buffer;
in response to determining the data is located within the Drift Buffer, read the requested data from the Drift Buffer; and
in response to determining the data is not located in the Drift Buffer, obtain the VBA from the LVT entry corresponding to the logical address of the requested data and read the requested data in the memory card corresponding to the VBA.

2. The system of claim 1 , further comprising programming instructions that when executed by the at least one processor configure the system to: update, in response to reading the requested data from the memory card, a read level count field in the LVT.

3. The system of claim 2 , further comprising programming instructions that when executed by the at least one processor configure the system to: compare the read level count in the LVT entry to a read level threshold field in the LVT entry, and in response to the read level count being equal to or exceeding the read level threshold, write the data to be read to a new location on the one or more memory cards with a different VBA.

4. The system of claim 3 , further comprising programming instructions that when executed by the at least one processor configure the system to: in response to writing the data to be read to a new location on the one or more memory cards with a different VBA, update the LVT with the different VBA.

5. The system of claim 4 , further comprising programming instructions that when executed by the at least one processor configure the system to: update the VBA in a corresponding LVT entry in response to data being removed from the Drift Buffer.

6. The system of claim 1 , further comprising programming instructions that when executed by the at least one processor configure the system to: move, in response to reading data from the Drift buffer, an entry to a head of the Drift Buffer.

7. A system of writing data to one or more memory cards, each memory card having a plurality of storage chips, and each storage chip having a plurality of dies having a plurality of memory cells, the system comprising:
one or more programmable readable storage media; and
programming instructions stored on the one or more programmable readable storage media for execution by at least one processor, the programming instructions when executed by the at least one processor configure the system to:
issue a request to write the data to the one or more memory cards;
obtain an available virtual block address (VBA) from a VBA Free List, wherein the VBA corresponds to a group of memory cells in the one or more memory cards;
write the data to the memory card location corresponding to an available VBA obtained from the VBA Free List;
write the data to an entry in a Drift Buffer;
write the VBA of the available VBA and a corresponding logical address of that available VBA to an entry in a Drift Table that corresponds to the entry in the Drift Buffer.

8. The system of claim 7 , further comprising programming instructions that when executed by the at least one processor configure the system to: write a corresponding logical to virtual translation table (LVT) entry with the available VBA.

9. The method of claim 7 , further comprising programming instructions that when executed by the at least one processor configure the system to:
write into a logical to virtual translation table (LVT) entry corresponding to the VBA that corresponds to the location on the memory card to which the data is written, a drift table index identifying a Drift Table entry corresponding to the Drift Buffer entry to which the data is written, and
set a bit to identify the data is in the Drift Buffer.

10. A method for storing data in a memory system, the memory system comprising:
one or more memory cards, each memory card having a plurality of storage chips, and each storage chip having a plurality of dies having a plurality of memory cells; and a memory controller comprising a translation module, the translation module having a logical to virtual translation table (LVT) having a plurality of entries, each entry in the LVT configured to map a logical address to a virtual block address (VBA), where the VBA corresponds to a group of the memory cells on the one or more memory cards,
the method comprising:
tracking at least one of a group consisting of a number of writing operations to the VBA mapped to that LVT entry, a number of read operations for the VBA mapped to that LVT entry, and combinations thereof.

11. The method of claim 10 , further comprising: programming a write wear level threshold in the LVT corresponding to the maximum number of writing operations to a VBA, and in response to a write operation exceeding the write level threshold in an LVT entry, moving the data in the memory card corresponding to the LVT entry that exceeds the write wear level threshold to a new location on the memory card with a different VBA.

12. The method of claim 11 , further comprising obtaining a new VBA from a VBA Free List identifying VBAs available to write data based upon the wear level count.

13. The method of claim 10 , further comprising programming a read wear level count threshold in the LVT corresponding to a maximum number of reading operations of a VBA, and in response to a read operation exceeding the read level threshold in a LVT entry, writing the data in the memory card corresponding to the LVT entry that exceeds the read level threshold to a new location on the memory card with a different VBA.

14. The method of claim 13 , further comprising obtaining, in response to a read operation exceeding the read level threshold for a LVT entry, a new VBA from a VBA Free List identifying the VBAs available to receive write data, and writing the data in the memory card corresponding to the LVT entry that exceeds the read level threshold to the new VBA.

15. The method of claim 14 , further comprising obtaining, in response to a read operation exceeding the read level threshold, a new VBA from the VBA Free List based upon the wear level count.

16. The method of claim 10 , further comprising writing, in response to writing data to a VBA on the one or more memory cards, the data to an entry in a Drift Buffer having a plurality of entries to temporarily store data, and further writing the VBA and the corresponding logical address into an entry in a Drift Table indexed to a corresponding entry in the Drift Buffer, wherein each entry in the Drift Table maps a Drift Buffer Index to a VBA.

17. The method of claim 16 , further comprising reading data from the Drift Buffer in response to the data

Assignees

• IBM

Inventors

• Moertl Daniel Frank
• Jamsek Damir Anthony
• Martin Andrew Kenneth
• Pozidis Charalampos
• Galbraith Robert Edward
• Ekman Jeremy T
• Harrison Abby
• Grabowski Gerald Mark
• Norgaard Steven

Classifications

• G11C16/3495

  Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically · CPC title

• G06F11/073

  in a memory management context, e.g. virtual memory or cache management (memory management G06F12/00; testing of static memory units G11C29/00) · CPC title

• G11C29/52

  Protection of memory contents; Detection of errors in memory contents · CPC title

• G11C2211/5644

  Multilevel memory comprising counting devices · CPC title

• G11C29/4401

  for self repair · CPC title