One-shot state transition probability encoder and decoder

Patent metadata

Field	Value
Publication number	US-11675533-B2
Application number	US-202217825905-A
Country	US
Kind code	B2
Filing date	May 26, 2022
Priority date	Aug 21, 2020
Publication date	Jun 13, 2023
Grant date	Jun 13, 2023

Abstract

A one-shot state transition decoder receives a codeword having N-bits. The decoder reads a first D-bits of the codeword to determine a stitching location d within the codeword. The stitching location identifies a start bit of unencoded data in the codeword. The codeword is decoded into an output buffer for user data of L bits, where N>L. Parameters of the decoder are set before the decoding, including setting a length of the codeword to N−L+d and a number of expected decoded bits to d. The decoding including decoding the d bits based on a set of state transition probabilities and copying decoded bits into the output buffer, the unencoded data being copied to the end of the output buffer.

First claim

What is claimed is:

1. A method, comprising:
receiving a signal comprising an N-bit codeword at a processing circuit comprising a modulation decoder;
reading a first D-bits of the codeword to determine a stitching location d within the codeword, the stitching location identifying a start bit of unencoded data in the codeword;
performing a decoding of the codeword into an output buffer for user data comprising L bits, L<N, wherein parameters of the modulation decoder are set before the decoding, the setting of the parameters including setting a number of expected decoded bits to d and a length of the codeword to N−L+d, the decoding including decoding the d bits based on a set of state transition probabilities and copying decoded bits into the output buffer;
copying the unencoded data to an end of the output buffer; and
sending the output buffer as recovered user data to a host.

2. The method of claim 1 , wherein based on the first D-bits being a predetermined pattern, there are no unencoded bits in the codeword and the decoding comprises decoding all N−D bits of the codeword excluding the first D-bits.

3. The method of claim 2 , wherein the predetermined pattern is all ones.

4. The method of claim 1 , wherein the set of state transition probabilities comprise a set of Markov state transition probabilities used in an encoding of the codeword.

5. The method of claim 4 , wherein the encoding implements probabilistic constraints that minimize certain patterns in generated codeword sequences without eliminating the certain patterns.

6. The method of claim 4 , wherein the encoding implements deterministic constraints that eliminate certain patterns in generated codeword sequences.

7. The method of claim 1 , wherein the codeword is received from a low-density parity check (LDPC) decoder.

8. The method of claim 1 , further comprising:
finding a first unencoded bit of the unencoded data; and
if the first unencoded bit is equal to a first value, perform a final bit carry operation when decoding the codeword, otherwise do not perform the final bit carry operation if the first unencoded bit is not equal to the first value.

9. An apparatus, comprising a processing circuit, the processing circuit comprising:
an error correction decoder that decodes an N-bit codeword based on data read from a storage media; and
a modulation decoder operable to:
receive a signal comprising the codeword from the storage media;
read a first D-bits of the codeword to determine a stitching location d within the codeword, the stitching location identifying a start bit of unencoded data in the codeword;
perform a decoding of the codeword into an output buffer for user data comprising L bits, L<N, wherein parameters of the modulation decoder are set before the decoding, the setting of the parameters including setting a number of expected decoded bits to d and a length of the codeword to N−L+d, the decoding including decoding the d bits based on a set of state transition probabilities and copying decoded bits into the output buffer;
copy the unencoded data to an end of the output buffer; and
sending the output buffer as recovered user data to a host.

10. The apparatus of claim 9 , wherein based on the first D-bits being a predetermined pattern, there are no unencoded bits in the codeword and the decoding comprises decoding all N−D bits of the codeword excluding the first D-bits.

11. The apparatus of claim 9 , wherein the set of state transition probabilities comprise a set of Markov state transition probabilities used in an encoding of the codeword.

12. The apparatus of claim 11 , wherein the encoding implements probabilistic constraints that minimizes certain patterns in generated codeword sequences without eliminating the certain patterns.

13. The apparatus of claim 11 , wherein the encoding implements deterministic constraints that eliminates certain patterns in generated codeword sequences.

14. The apparatus of claim 9 , wherein the error correction decoder comprises a low-density parity check (LDPC) decoder.

Assignees

• Seagate Technology Llc

Inventors

• Wang Zheng
• Marrow Marcus
• Bellorado Jason

Classifications

• H03M13/3961

  Arrangements of methods for branch or transition metric calculation · CPC title

• H04L1/0045

  Arrangements at the receiver end · CPC title

• G06F3/0604

  Improving or facilitating administration, e.g. storage management · CPC title

• H03M5/145 Primary

  Conversion to or from block codes or representations thereof · CPC title

• G06F18/295

  Markov models or related models, e.g. semi-Markov models; Markov random fields; Networks embedding Markov models · CPC title