Thin film transistor and manufacturing method thereof, array substrate, display device and sensor

Patent metadata

Field	Value
Publication number	US-11670702-B2
Application number	US-201916650484-A
Country	US
Kind code	B2
Filing date	Sep 11, 2019
Priority date	Sep 25, 2018
Publication date	Jun 6, 2023
Grant date	Jun 6, 2023

Abstract

Provided is a thin film transistor including a highly-textured dielectric layer, an active layer, a gate electrode and a source/drain electrode that are stacked on a base substrate. The source/drain electrode includes a source electrode and a drain electrode. The gate electrode and the active layer are insulated from each other. The source electrode and the drain electrode are electrically connected to the active layer. Constituent particles of the active layer are of monocrystalline silicon-like structures. According to the present disclosure, the highly-textured dielectric layer is adopted to replace an original buffer layer to induce the active layer to grow into a monocrystalline silicon-like structure, such that the performance of the thin film transistor is improved.

First claim

What is claimed is:

1. A thin film transistor, comprising a highly-textured dielectric layer, an active layer, a gate electrode and a source/drain electrode that are disposed on a base substrate; wherein
the active layer is disposed on a side, away from the base substrate; of the highly-textured dielectric layer;
the gate electrode and the active layer are insulated from each other, and the source/drain electrode comprises a source electrode and a drain electrode that are electrically connected to the active layer;
the active layer is a semiconductor film layer comprising a material of a silicon structure and grains are higher in orientation consistency in the active layer, and a dehydrogenated amorphous silicon layer is crystallized to convert the dehydrogenated amorphous silicon layer into the active layer; and
orientation indexes in crystals are higher in consistency in the highly-textured dielectric layer and constituent particles of the highly-textured dielectric layer have the same orientation index as monocrystalline silicon, and the highly-textured dielectric layer functions as a buffer layer and an induction template layer; and
the highly-textured dielectric layer induces constituent particles of the dehydrogenated amorphous silicon layer to be crystallized in the same direction as orientation indexes of the constituent particles of the highly-textured dielectric layer during crystallization of the amorphous silicon layer to form crystals of a single orientation.

2. The thin film transistor according to claim 1 , wherein
the highly-textured dielectric layer is made from any one of magnesium oxide, cerium oxide and zirconium oxide doped with yttrium.

3. The thin film transistor according to claim 1 , wherein the gate electrode is disposed on a side, away from the base substrate, of the active layer, and the source/drain electrode is disposed on a side, away from the base substrate, of the gate electrode.

4. The thin film transistor according to claim 3 , further comprising a first gate insulating layer and a second gate insulating layer; wherein
the first gate insulating layer is disposed between the active layer and the gate electrode, and the second gate insulating layer is disposed between the gate electrode and the source/drain electrode.

5. The thin film transistor according to claim 1 , wherein the gate electrode is disposed on a side, close to the base substrate, of the highly-textured dielectric layer, and the source/drain electrode is disposed on a side, away from the base substrate, of the active layer.

6. The thin film transistor according to claim 5 , further comprising a first gate insulating layer disposed between the highly-textured dielectric layer and the gate electrode.

7. A method of manufacturing a thin film transistor, comprising:
providing a base substrate;
forming a highly-textured dielectric layer on the base substrate;
forming an amorphous silicon layer on the base substrate on which the highly-textured dielectric layer is formed;
crystallizing a dehydrogenated amorphous silicon layer to convert the dehydrogenated amorphous silicon layer into a semiconductor film layer comprising a material of a silicon structure, to form an active layer;
forming a gate electrode and a source/drain electrode on the base substrate, wherein the source/drain electrode comprises a source electrode and a drain electrode, the gate electrode and the active layer are insulated from each other, and the source electrode and the drain electrode are electrically connected to the active layer; and
wherein grains are higher in orientation consistency in the active layer, orientation indexes in crystals are higher in consistency in the highly-textured dielectric layer, and constituent particles of the highly-textured dielectric layer have the same orientation index as monocrystalline silicon; and the highly-textured dielectric layer functions as a buffer layer and an induction template layer; and
the highly-textured dielectric layer induces constituent particles of the dehydrogenated amorphous silicon layer to be crystallized in the same direction as orientation indexes of the constituent particles of the highly-textured dielectric layer during crystallization of the amorphous silicon layer to form crystals of a single orientation.

8. The method according to claim 7 , wherein forming the amorphous silicon layer on the base substrate on which the highly-textured dielectric layer is formed comprises:
depositing an amorphous silicon material on a side, away from the base substrate, of the highly-textured dielectric layer to form the amorphous silicon layer.

9. The method according to claim 7 , wherein crystallizing the amorphous silicon layer comprises:
crystallizing the amorphous silicon layer by an excimer laser annealing process.

10. The method according to claim 7 , wherein forming the highly-textured dielectric layer on the base substrate comprises:
forming the highly-textured dielectric layer on the base substrate by an electron beam evaporation process or an ion beam deposition process.

11. The method according to claim 7 , wherein forming the gate electrode and the source/drain electrode on the base substrate comprises:
sequentially forming the gate electrode and the source/drain electrode on the base substrate on which the active layer is formed.

12. The method according to claim 11 , after forming the active layer and prior to forming the gate electrode on the base substrate on which the active layer is formed, the method further comprises:
forming a first gate insulating layer on the base substrate on which the active layer is formed; and
after forming the gate electrode and prior to forming the source/drain electrode, the method further comprises:
forming a second gate insulating layer on the base substrate on which the gate electrode is formed.

13. The method according to claim 7 , forming the gate electrode and the source/drain electrode on the base substrate on which the active layer is formed comprises:
prior to forming the highly-textured dielectric layer, forming the gate electrode on the base substrate; and
after forming the active layer, forming the source/drain electrode on the base substrate on which the active layer is formed.

14. The method according to claim 7 , wherein
the highly-textured dielectric layer is made from any one of magnesium oxide, cerium oxide and zirconium oxide doped with yttrium.

15. An array substrate, comprising a base substrate and a thin film transistor disposed on the base substrate, wherein the thin film transistor comprises a highly-textured dielectric layer, an active layer, a gate electrode and a source/drain electrode; wherein
the active layer is disposed on a side; away from the base substrate, of the highly-textured dielectric layer;
the gate electrode and the active layer are insulated from each other, and the source/drain electrode comprises a source electrode and a drain electrode that are electrically connected to the active layer;
the active layer is a semiconductor film layer comprising a material of a silicon and grains are higher in orientation consistency in the active layer, and a dehydrogenated amorphous silicon layer is crystallized to convert the dehydrogenated amorphous silicon layer into the active layer; and
orientation indexes in crystals are higher in consistency in the highly-textured dielectric layer, and constituent particles of the highly-textured dielectric layer have the same orientation index as monocrystalline silicon, and the highly-textured dielectric layer functions as a buffer layer and an induction t

Assignees

• Beijing Boe Display Tech Co
• Boe Technology Group Co Ltd

Inventors

• Gui Bingqiang
• Qu Lianjie
• Qi Yonglian
• Zhao Hebin
• Qiu Yun

Classifications

• H10P14/69395

  the material containing zirconium, e.g. ZrO2 · CPC title

• H10P14/6939

  characterised by the metal · CPC title

• H10P14/6329

  using physical ablation of a target, e.g. physical vapour deposition or pulsed laser deposition · CPC title

• H10P14/3816

  Pulsed laser beam · CPC title

• H10P14/3466

  Crystal orientation · CPC title