Display substrate, preparation method thereof and display device

Patent metadata

Field	Value
Publication number	US-11670646-B2
Application number	US-202117194398-A
Country	US
Kind code	B2
Filing date	Mar 8, 2021
Priority date	Jul 20, 2020
Publication date	Jun 6, 2023
Grant date	Jun 6, 2023

Abstract

Provided are a display substrate, a preparation method thereof, and a display device. The display substrate includes: a substrate, a thin film transistor disposed in a pixel island region of the substrate, a first signal line disposed in the pixel island region and a first connecting bridge disposed in a bridge region of the substrate, wherein the first connecting bridge is electrically connected to a gate of the thin film transistor.

First claim

What is claimed is:

1. A display substrate, comprising:
a substrate, comprising a plurality of pixel island regions spaced apart and a plurality of bridge regions connecting adjacent pixel island regions;
thin film transistors, disposed in the pixel island regions, wherein the thin film transistors comprise an active layer, a first gate insulating layer, a first gate, a second gate insulating layer, a second gate, a dielectric layer, and a source/drain layer which are disposed on the substrate and sequentially laminated;
first signal lines, disposed in the pixel island regions; and
first connecting bridges, disposed in the bridge regions;
wherein the first signal lines are electrically connected to the first or second gates of the thin film transistors, the first connecting bridges are connected to the first signal lines in the adjacent pixel island regions along a first direction, and the first connecting bridges and the first signal lines are disposed in a same layer as the gates of the thin film transistors;
the first signal lines extends along the first direction, the first connecting bridges, the first signal lines, and the gate are all made of an aluminum alloy and have an elongation at break of 1.5% to 3%, and the first and second gates have a thickness of 300 nm to 500 nm along a direction perpendicular to the bearing surface of the substrate; and
the display substrate further comprises second connecting bridges disposed in the bridge regions and second signal lines disposed in the pixel island regions, wherein the second signal lines are electrically connected to the sources/drains of the thin film transistors and extend along the second direction; the second connecting bridges are electrically connected to the second signal lines in the adjacent pixel island regions along the second direction; both the second connecting bridges and the second signal lines are disposed in the same layer as the sources/drains of the thin film transistors; and the first direction is perpendicular to the second direction.

2. The display substrate according to claim 1 , wherein the first connecting bridges, the first signal lines, and the first and second gates have a same resistivity.

3. The display substrate according to claim 2 , wherein the resistivity is 1 μOhmcm to 4 μOhmcm.

4. The display substrate according to claim 1 , further comprising second connecting bridges disposed in the bridge regions and second signal lines disposed in the pixel island regions;
wherein the second signal lines are electrically connected to sources/drains of the thin film transistors, the second connecting bridges are connected to the second signal lines in the adjacent pixel island regions along a second direction, the second connecting bridges and the second signal lines are disposed in the same layer as the sources/drains of the thin film transistors, and the first direction intersects the second direction.

5. The display substrate according to claim 4 , wherein the first direction is perpendicular to the second direction.

6. The display substrate according to claim 4 , wherein the first signal line extends along the first direction, and the second signal line extends along the second direction.

7. The display substrate according to claim 4 , wherein the first signal lines are scanning lines, and the second signal lines are data lines.

8. The display substrate according to claim 1 , wherein
the first connecting bridge and the first signal line are disposed in a same layer as the first gate, or the first connecting bridge and the first signal line are disposed in a same layer as the second gate.

9. The display substrate according to claim 8 , comprising:
a base substrate;
a polyimide film layer disposed on a side of the base substrate;
a first buffer layer disposed on a side of the polyimide film layer distal from the base substrate; and
a second buffer layer disposed on a side of the first buffer layer distal from the polyimide film layer;
wherein the active layer is disposed on a side of the second buffer layer distal from the first buffer layer.

10. A display device, comprising a display substrate and a driving module, wherein
the display substrate comprises a substrate, thin film transistors, first signal lines, and first connecting bridges; wherein the substrate comprises a plurality of pixel island regions spaced apart and a plurality of bridge regions connecting adjacent pixel island regions, the thin film transistors are disposed in the pixel island regions, and the thin film transistors comprise an active layer, a first gate insulating layer, a first gate, a second gate insulating layer, a second gate, a dielectric layer, and a source/drain layer which are disposed on the substrate and sequentially laminated, the first signal lines are disposed in the pixel island regions, the first connecting bridges are disposed in the bridge regions, the first signal lines are electrically connected to first or second gates of the thin film transistors, the first connecting bridges are connected to the first signal lines in the adjacent pixel island regions along a first direction, and the first connecting bridges and the first signal lines are disposed in the same layer as the first and second gates of the thin film transistors; the first signal lines extends along the first direction, the first connecting bridges, the first signal lines, and the first and second gates are all made of an aluminum alloy and have an elongation at break of 1.5% to 3%, and the first and second gates has a thickness of 300 nm to 500 nm along a direction perpendicular to the bearing surface of the substrate; and the display substrate further comprises second connecting bridges disposed in the bridge regions and second signal lines disposed in the pixel island regions, wherein the second signal lines are electrically connected to the sources/drains of the thin film transistors and extend along the second direction; the second connecting bridges are electrically connected to the second signal lines in the adjacent pixel island regions along the second direction; both the second connecting bridges and the second signal lines are disposed in the same layer as the sources/drains of the thin film transistors; and the first direction is perpendicular to the second direction; and
the driving module is electrically connected to the first signal lines and configured to provide a driving signal for the first signal lines.

11. The display device according to claim 10 , wherein the first connecting bridges, the first signal lines and the first and second gates have the same resistivity of 1 μOhmcm to 4 μOhmcm.

Assignees

• Boe Technology Group Co Ltd

Inventors

• Qu Caiyu
• Cao Fangxu
• Hao Yanjun
• Zhang Huijuan
• Fan Yibing
• Song Zunqing
• Chen Dengyun

Classifications

• H10D86/431

  having different compositions, shapes, layouts or thicknesses of gate insulators in different TFTs · CPC title

• H10D86/021

  of multiple TFTs · CPC title

• H10D86/443 Primary

  adapted for preventing breakage, peeling or short circuiting · CPC title

• H10D86/60 Primary

  wherein the TFTs are in active matrices · CPC title

• H10D86/411

  characterised by materials, geometry or structure of the substrates · CPC title